8.1-RC2 - PCI fatal error or MCE triggered by USB/ehci on Sun X4100M2?

[Jeremy Chadwick]

On Mon, Jul 12, 2010 at 05:23:23PM +0200, Markus Gebert wrote:
> 
> On 12.07.2010, at 17:06, John Baldwin wrote:
> 
> > Are you using Cx states other than C1 for the CPUs at all?
> 
> Not sure how to find out, but I did not change anything in the BIOS settings (if even possible) or through sysctl regarding cpu idle modes. Anyway, here's what I found:
> 
> # sysctl machdep.idle machdep.idle_available
> machdep.idle: amdc1e
> machdep.idle_available: spin, amdc1e, hlt, acpi, 
> 
> Not sure if "amdc1e" qualifies for something "other than C1". I tried "hlt" once, which didn't make a difference IIRC. And if that's not what you needed, here's more:
> 
> # sysctl dev.cpu
> [...]
> dev.cpu.0.freq_levels: 2786/95000 2587/81800 2388/69811 2189/58977 1990/49240 1791/44316 995/22525
> dev.cpu.0.cx_supported: C1/0
> dev.cpu.0.cx_lowest: C1
> [...]

cx_supported indicates your CPU only supports C1 and not lower
power-saving states (C2/C3/C4, etc.).  Non-C1 states can sometimes do
"interesting" things when it comes to interrupt handling.  I believe
your system may support the C1E state (given what machdep.idle_available
shows), but that's often controlled by the system BIOS (on both Intel
and AMD processors, but I'm trying to focus on AMD here).  C1E, as far
as I know, is the same as C1 state except can save a little bit more
power.

I believe neither C1 nor C1E do anything with interrupts, instead just
halting the core when idle/not in use.  HLT mode, at least on multi-core
AMD CPUs, equates to C1E.

Shot in the dark: you're not running powerd(8) on this system are you?

-- 
| Jeremy Chadwick                                   jdc at parodius.com |
| Parodius Networking                       http://www.parodius.com/ |
| UNIX Systems Administrator                  Mountain View, CA, USA |
| Making life hard for others since 1977.              PGP: 4BD6C0CB |