sparc64/82261: DMA-support on Sparc64 broken
Sebastian Koehler
acex5 at syncer.de
Fri Jul 8 20:20:17 GMT 2005
The following reply was made to PR sparc64/82261; it has been noted by GNATS.
From: Sebastian Koehler <acex5 at syncer.de>
To: bug-followup at FreeBSD.org
Cc:
Subject: Re: sparc64/82261: DMA-support on Sparc64 broken
Date: Fri, 08 Jul 2005 22:19:10 +0200
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Hi list,
got the attached patch from Marius Strobl. Unfortunately problem was not
fixed trough it. When ata_generic_reset(dev) is below if (ctlr...) in
ata_ali_reset() and system is booting up with hw.ata.ata_dma=1 still
data corruption occurs. See the next lines for details.
...
Additional routing options:.
Starting devd.
Mounting NFS file systems:.
Creating and/or trimming log files:.
Starting syslogd.
Checking for core dump on /dev/ad0b...
/libexec/ld-elf.so.1: /lib/libz.so.2: invalid file format
ELF ldconfig path: /lib /usr/lib /usr/lib/compat /usr/local/lib
Starting local daemons:.
...
sunshine# sysctl -a | grep ata_dma
hw.ata.ata_dma: 1
sunshine#
sunshine# dmesg
...
uart1: <16550 or compatible> at port 0x2e8-0x2ef irq 43 on isa0
Timecounters tick every 1.000 msec
ad0: 38166MB <Seagate ST340824A 3.28> at ata2-master UDMA66
Trying to mount root from ufs:/dev/ad0a
ad0: TIMEOUT - WRITE_DMA retrying (1 retry left) LBA=256
ad0: TIMEOUT - WRITE_DMA retrying (1 retry left) LBA=394976
ad0: TIMEOUT - WRITE_DMA retrying (1 retry left) LBA=3635040
dc0: failed to force tx and rx to idle state
dc0: failed to force tx and rx to idle state
dc0: failed to force tx and rx to idle state
dc0: failed to force tx and rx to idle state
ad0: TIMEOUT - WRITE_DMA retrying (1 retry left) LBA=224
Sebastian
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Index: ata-chipset.c
===================================================================
RCS file: /mnt/futile/usr/data/bsd/cvs/fbsd/src/sys/dev/ata/ata-chipset.c,v
retrieving revision 1.126
diff -u -r1.126 ata-chipset.c
--- ata-chipset.c 10 Jun 2005 07:43:10 -0000 1.126
+++ ata-chipset.c 25 Jun 2005 11:10:56 -0000
@@ -74,6 +74,7 @@
static void ata_acard_86X_setmode(device_t dev, int mode);
static int ata_ali_chipinit(device_t dev);
static int ata_ali_allocate(device_t dev);
+static void ata_ali_reset(device_t dev);
static void ata_ali_setmode(device_t dev, int mode);
static int ata_amd_chipinit(device_t dev);
static int ata_cyrix_chipinit(device_t dev);
@@ -853,6 +854,7 @@
device_set_desc_copy(dev, buffer);
ctlr->chip = idx;
ctlr->chipinit = ata_ali_chipinit;
+ ctlr->reset = ata_ali_reset;
return 0;
}
@@ -937,6 +939,35 @@
}
static void
+ata_ali_reset(device_t dev)
+{
+ device_t parent = device_get_parent(dev);
+ struct ata_pci_controller *ctlr = device_get_softc(parent);
+ struct ata_channel *ch = device_get_softc(dev);
+ device_t *children;
+ int nchildren, i;
+ u_int8_t ideic;
+
+ ata_generic_reset(dev);
+ if (ctlr->chip->cfg2 & ALINEW && ctlr->chip->chiprev < 0xc4) {
+ if (!device_get_children(device_get_parent(parent), &children,
+ &nchildren)) {
+ for (i = 0; i < nchildren; i++) {
+ if (pci_get_devid(children[i]) == 0x153310b9) {
+ ideic = pci_read_config(children[i], 0x58, 1);
+ pci_write_config(children[i], 0x58,
+ ideic & ~(0x04 << ch->unit), 1);
+ ata_udelay(1000);
+ pci_write_config(children[i], 0x58, ideic, 1);
+ break;
+ }
+ }
+ free(children, M_TEMP);
+ }
+ }
+}
+
+static void
ata_ali_setmode(device_t dev, int mode)
{
device_t gparent = GRANDPARENT(dev);
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