pre-newbus address decoding

[Marcel Moolenaar]

On Tue, Jul 08, 2003 at 03:28:15PM +0200, Thomas Moestl wrote:
> > 
> > Q2: Am I correct that the basic logic is to traverse to the root and
> >     decode the address at each intermediate parent, until we end up
> >     with what is then the physical address?
> 
> Yes. I've put some old sio patches which I use at
>   http://people.freebsd.org/~tmm/sio-s64-20030612.diff
> in case you are interested (this is a quick and dirty hack; the
> code I use to attach the console is at the very end). As you can see,
> I special-cased the register mapping at PCI and ISA/EBus level (which
> I guess you want to avoid to be more generic).

Cool. This is exactly what I'm looking for.

> > Q4: Given the above, does it make sense to add decoding functionality
> >     to the bus drivers as a low-level interface between low-level
> >     console drivers and OFW (ie not using newbus data structures)?
> 
> I guess a generic mapping function would be preferable if it is
> possible and all firmware implementation are close enough to the
> standard to allow this. The bus drivers will mostly just do the same,
> but attaching them early would probably be more trouble.

Ok. I'll add one on the uart branch. At first it'll be a copy of what
you have in the sio patch, but it'll probably evolve. Unfortunately
all my UARTs are on EBUS. Then again, a PCI multi I/O card shouldn't
be that expensive...

Last questions: Since I create a fake bustag, I need to have a valid
bus space type (bus_space_asi index).
Am I correct that the PCI types use little endian reads and writes?
If so, can I avoid the problem by always using 8-byte reads/writes
and just use type 0 or is the magic slightly more complex and do I
need to keep track of a proper type while traversing to the root?

-- 
 Marcel Moolenaar	  USPA: A-39004		 marcel at xcllnt.net