multimedia/MMX, Celeron CPU, and the kernel config
Louis LeBlanc
leblanc+freebsd at keyslapper.org
Mon Sep 1 10:56:25 PDT 2003
On 09/01/03 05:04 AM, Ricardo Mesquita sat at the `puter and typed:
> Louis LeBlanc wrote:
> > Hey all. I've just installed the mplayer and mplayerxp ports for
> > video support. I've never quite had it right with aviplay and
> > plaympeg, but I never quite understood why.
> >
> > Well, when I run mplayer, I get the following:
> >
> > CPU: Intel Celeron A Mendocino/Pentium II Dixon (Family: 6, Stepping: 0)
> > Detected cache-line size is 32 bytes
> > CPUflags: MMX: 1 MMX2: 0 3DNow: 0 3DNow2: 0 SSE: 0 SSE2: 0
> > Compiled with Runtime CPU Detection - WARNING - this is not optimal!
> > To get best performance, recompile MPlayer with --disable-runtime-cpudetection
> >
> > And mplayerxp gives the following:
> > CPU vendor name: GenuineIntel max cpuid level: 2
> > CPU: Intel Celeron A Mendocino/Pentium II Dixon (Type: 6, Stepping: 0)
> > MMX supported but disabled
> > CPUflags: Type: 6 MMX: 0 MMX2: 0 3DNow: 0 3DNow2: 0 SSE: 0 SSE2: 0
> > Compiled for x86 CPU with features: 3DNow 3DNowEx SSE
> >
> > So I'm confused as to whether I've got the best configuration for my
> > custom kernel. Is there a way I can discover the exact model of my
> > cpu without cracking the case?
> > ....
>
> > Thanks!
> > Lou
>
> Check x86info
Thanks a lot! This gives quite a lot of info about the chip:
Family: 6 Model: 6 Stepping: 0 Type: 0 Brand: 0
CPU Model: Celeron (Mendocino) Original OEM
Feature flags:
Onboard FPU
Virtual Mode Extensions
Debugging Extensions
Page Size Extensions
Time Stamp Counter
Model-Specific Registers
Physical Address Extensions
Machine Check Architecture
CMPXCHG8 instruction
SYSENTER/SYSEXIT
Memory Type Range Registers
Page Global Enable
Machine Check Architecture
CMOV instruction
Page Attribute Table
36-bit PSEs
MMX support
FXSAVE and FXRESTORE instructions
Extended feature flags:
Instruction TLB: 4KB pages, 4-way associative, 32 entries
Instruction TLB: 4MB pages, fully associative, 2 entries
Data TLB: 4KB pages, 4-way associative, 64 entries
L2 unified cache:
Size: 128KB 4-way associative.
line size=32 bytes.
L1 Instruction cache:
Size: 16KB 4-way associative.
line size=32 bytes.
Data TLB: 4MB pages, 4-way associative, 8 entries
L1 Data cache:
Size: 16KB 4-way associative.
line size=32 bytes.
/dev/cpu/0/msr: No such file or directory
Connector type: Socket 370 (370 Pin PGA)
MTRR registers:
MTRRcap (0xfe): MTRRphysBase0 (0x200): MTRRphysMask0 (0x201):
MTRRphysBase1 (0x202): MTRRphysMask1 (0x203): MTRRphysBase2 (0x204):
MTRRphysMask2 (0x205): MTRRphysBase3 (0x206): MTRRphysMask3 (0x207):
MTRRphysBase4 (0x208): MTRRphysMask4 (0x209): MTRRphysBase5 (0x20a):
MTRRphysMask5 (0x20b): MTRRphysBase6 (0x20c): MTRRphysMask6 (0x20d):
MTRRphysBase7 (0x20e): MTRRphysMask7 (0x20f): MTRRfix64K_00000
(0x250): MTRRfix16K_80000 (0x258): MTRRfix16K_A0000 (0x259):
MTRRfix4K_C8000 (0x269): MTRRfix4K_D0000 0x26a: MTRRfix4K_D8000 0x26b:
MTRRfix4K_E0000 0x26c: MTRRfix4K_E8000 0x26d: MTRRfix4K_F0000 0x26e:
MTRRfix4K_F8000 0x26f: MTRRdefType (0x2ff):
400MHz processor (estimate).
Now, I realize no one will want to make 'supported' or 'guaranteed'
recommendations, but I would certainly appreciate some pointers on
taking the above information and determining the ideal CPU options to
use in my kernel. I looked at the handbook, and can't find any such
details or links. My main goal is to find out what CPU features are
disabled through the kernel config, and enable them - particularly MMX
support.
Finally, I noticed my message log from bootup has the following:
Features=0x183f9ff<FPU,VME,DE,PSE,TSC,MSR,PAE,MCE,CX8,SEP,MTRR,PGE,MCA,CMOV,PAT,PSE36,MMX,FXSR>
Does this specify just detection or kernel config? It appears to
match the features detected by x86info.
Thanks for all the help!
Lou
--
Louis LeBlanc leblanc at keyslapper.org
Fully Funded Hobbyist, KeySlapper Extrordinaire :)
http://www.keyslapper.org Ô¿Ô¬
aphorism, n.:
A concise, clever statement.
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