ports/147696: [patch] powerpc64 support for security/nss

[Nathan Whitehorn]

>Number:         147696
>Category:       ports
>Synopsis:       [patch] powerpc64 support for security/nss
>Confidential:   no
>Severity:       non-critical
>Priority:       low
>Responsible:    freebsd-ports-bugs
>State:          open
>Quarter:        
>Keywords:       
>Date-Required:
>Class:          change-request
>Submitter-Id:   current-users
>Arrival-Date:   Tue Jun 08 19:10:03 UTC 2010
>Closed-Date:
>Last-Modified:
>Originator:     Nathan Whitehorn
>Release:        FreeBSD 9.0-CURRENT powerpc64
>Organization:
University of Wisconsin
>Environment:
System: FreeBSD anacreon.physics.wisc.edu 9.0-CURRENT FreeBSD 9.0-CURRENT #3 r208870:208872: Sun Jun 6 09:33:03 CDT 2010 root at anacreon.physics.wisc.edu:/usr/obj/scratch/src/sys/ANACREON powerpc64
>Description:
security/nss fails to build on powerpc64, due to missing CPU_ARCH detection
and some G5-specific code in mpcpucache.c to detect cacheline sizes.
>How-To-Repeat:
>Fix:

The attached patch adds CPU_ARCH logic for powerpc64 and uses a
FreeBSD-specific sysctl interface to detect cacheline sizes on PPC64 systems.

--- nss-ppc64.diff begins here ---
--- mpcpucache.c.bak	2009-03-10 16:18:07.000000000 -0500
+++ mpcpucache.c	2010-06-02 08:00:28.000000000 -0500
@@ -733,6 +733,32 @@
 #endif
 
 #if defined(__ppc64__) 
+
+#if defined(__FreeBSD__)
+#include <sys/stddef.h>
+#include <sys/sysctl.h>
+
+#include <machine/cpu.h>
+#include <machine/md_var.h>
+
+unsigned long
+s_mpi_getProcessorLineSize()
+{
+	static int cacheline_size = 0;
+	static int cachemib[] = { CTL_MACHDEP, CPU_CACHELINE };
+	int clen;
+	
+	if (cacheline_size > 0)
+		return cacheline_size;
+
+	clen = sizeof(cacheline_size);
+	if (sysctl(cachemib, sizeof(cachemib) / sizeof(cachemib[0]),
+	    &cacheline_size, &clen, NULL, 0) < 0 || !cacheline_size)
+		return 128; /* guess */
+
+	return cacheline_size;
+}
+#else
 /*
  *  Sigh, The PPC has some really nice features to help us determine cache
  *  size, since it had lots of direct control functions to do so. The POWER
@@ -785,6 +811,7 @@
     }
     return 0;
 }
+#endif
 
 #define MPI_GET_PROCESSOR_LINE_SIZE_DEFINED 1
 #endif
--- patch-..::coreconf::FreeBSD.mk.bak	2010-06-02 07:44:28.000000000 -0500
+++ files/patch-..::coreconf::FreeBSD.mk	2010-06-02 07:48:03.000000000 -0500
@@ -13,7 +13,7 @@
  RANLIB			= ranlib
  
  CPU_ARCH		= $(OS_TEST)
-@@ -50,7 +50,22 @@
+@@ -50,7 +50,26 @@
  CPU_ARCH		= x86
  endif
  ifeq ($(CPU_ARCH),amd64)
@@ -24,6 +24,10 @@
 +ifeq ($(OS_TEST),alpha)
 +CPU_ARCH		= alpha
 +endif
++ifeq ($(OS_TEST),powerpc64)
++CPU_ARCH		= powerpc
++USE_64			= 1
++endif
 +ifeq ($(OS_TEST),powerpc)
 +CPU_ARCH		= powerpc
 +endif
--- nss-ppc64.diff ends here ---


>Release-Note:
>Audit-Trail:
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