mlx5 irq

[Michal Vančo]

On 01/10/2020 19:56, Olivier Cochard-Labbé wrote:
> On Thu, Oct 1, 2020 at 12:28 PM Hans Petter Selasky <hps at selasky.org> wrote:
>
>> On 2020-10-01 11:13, Michal Vančo via freebsd-net wrote:
>>> On 01/10/2020 10:52, Hans Petter Selasky wrote:
>>>> On 2020-10-01 10:24, Michal Vančo wrote:
>>>>> But why is the actual number of IRQ lines bigger than number of CPU
>>>>> cores?
>>>> There are some dedicated IRQ's used for firmware management.
>>>>
>>>> Else the driver will use the number of online CPU's by default as the
>>>> number of rings, if the hardware supports it.
>>> Thanks for clarification. Is there any way to optimize this? In my case
>>> I have 2 CPU sockets with 8 cores each (SMT is disabled). NIC is
>>> connected via PCIe to the first CPU socket (numa domain 0). In this
>>> case, wouldn't it be better if all interrupts were firing only on cores
>>> of first socket?
>>>
>> Hi,
>>
>> You can use "cpuset" to bind those IRQ threads to the right core.
>>
>>
>> You could try this RC script to bind them:
> https://github.com/ocochard/BSDRP/blob/master/BSDRP/Files/usr/local/etc/rc.d/mlx5en_affinity
>
Thank you. This is perfect.