T7200 CPU not detected by est

Gerrit Kühn gerrit at pmp.uni-hannover.de
Tue Jan 22 00:47:43 PST 2008


On Mon, 21 Jan 2008 09:01:02 -0800 Jeremy Chadwick <koitsu at FreeBSD.org>
wrote about Re: T7200 CPU not detected by est:

JC> > Jan 18 23:18:14 comet kernel: est1: <Enhanced SpeedStep Frequency
JC> > Control> on cpu1 Jan 18 23:18:14 comet kernel: est: CPU supports
JC> > Control> Enhanced Speedstep, but is not recognized. 
JC> > Jan 18 23:18:14 comet kernel: est: cpu_vendor GenuineIntel, msr
JC> > 6130c2906000c29 Jan 18 23:18:14 comet kernel: device_attach: est1
JC> > attach returned 6 

JC> I see identical behaviour on our Supermicro PDSMI+ systems, using E6420
JC> CPUs, so I don't believe the problem is specific to your motherboard or
JC> certain Intel CPU models:

It is definitely not bound to certain mainboards, because I see it on
several different ones. However, I have only T-series CPUs to test.

JC> CPU: Intel(R) Core(TM)2 CPU          6420  @ 2.13GHz (2128.01-MHz
JC> 686-class CPU) acpi0: <PTLTD   RSDT> on motherboard
JC> acpi0: [ITHREAD]
JC> acpi0: Power Button (fixed)
JC> cpu0: <ACPI CPU> on acpi0
JC> est0: <Enhanced SpeedStep Frequency Control> on cpu0
JC> est: CPU supports Enhanced Speedstep, but is not recognized.
JC> est: cpu_vendor GenuineIntel, msr 82a082a0600082a
JC> device_attach: est0 attach returned 6
JC> cpu1: <ACPI CPU> on acpi0
JC> est1: <Enhanced SpeedStep Frequency Control> on cpu1
JC> est: CPU supports Enhanced Speedstep, but is not recognized.
JC> est: cpu_vendor GenuineIntel, msr 82a082a0600082a
JC> device_attach: est1 attach returned 6

Ok, so it's probably neither specific for CPUs nor for the mainbaords;
however, up to now all CPUs with this problem are Core2 CPUs.

JC> In the case of our servers, we usually turn EIST off (this one
JC> particular box has it enabled) because of the above problem -- but I'd
JC> much rather have it turned on to help save power.  For a laptop or
JC> workstation, however, I can see this being an incredibly important
JC> feature.

I run low power workstations here which are intended to be used in a lab
environment, and I would very much like to have working power-saving
features (otherwise the whole setup is quite useless).

Can I somehow help debugging this, should I file a PR or are there any
further recommended things to do?


cu
  Gerrit


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