FreeBSD 10.0-STABLE on EdgeRouter Lite notes/issues

[Stacey Son]

Hi Warner...

On Aug 28, 2014, at 3:06 PM, Warner Losh <imp at bsdimp.com> wrote:

> 
> On Aug 28, 2014, at 12:59 PM, Stacey Son <sson at FreeBSD.org> wrote:
> 
>> 
>>> Regarding https://bugs.freebsd.org/bugzilla/show_bug.cgi?id=177876 --
>>> is this patch still a good idea? Or has it been merged?
>> 
>> I have been using it for some time.  If you plan on mounting and using NFS volumes or anything else the might take a lot of kernel thread stack space then it is a good idea.
>> 
>> A better version of this patch (that moves the mips dependent code out of the vm layer) has been merged into a MIPS64 FreeBSD project and that code will be upstreamed sometime in the near future.   You can find the changes here:
>> 
>> https://github.com/CTSRD-CHERI/cheribsd/commit/b39bec2cefe36293ffb2322969c9f7c9cae8c1a2
>> 
>> https://github.com/CTSRD-CHERI/cheribsd/commit/04ea99d04f6d5a595be759d34e84e7fd9cea8166
> 
> I don’t suppose this could be done w/o adding #ifdef __mips__ to vm_glue? No need to block upstreaming on this, but it seems this could be a MD routine instead...

The plan is to add vm_kstack_valloc()'s and vm_kstack_palloc()'s to each ${ARCH}/vm_machdep.c.   Of course, it is there for mips but the non-mips arch version needs to be added.   Once the non-mips version is added the #ifdef __mips__'s in vm_glue.c can go away.  Note that this does replace a bit of #ifdef __mips__ wrapped code that was already in vm_glue.c.

> 
>> https://github.com/CTSRD-CHERI/cheribsd/commit/ae4f8d84bc30ffe2b2698534a2e6ab64480e8432
> 
> On the whole, I really like this, but was hoping it would be cleaner. There’s a crying need for it…

You may have noticed that this FreeBSD branch also includes my older change for increasing the kstack size by using multiple wired TLB entries.  When "option KSTACK_LARGE_PAGE" is not in the kernel config it defaults to using that for __mips_n64.   This, of course, makes switch.S a bit messy.   At some point it might be good to generate some of this lower level code at boot time depending on the mips hardware that is detected.  Especially for critical code like the TLB miss exception handler.

-stacey.