[rfc] mips74k/ar9344 support

[Adrian Chadd]

Hi,

http://people.freebsd.org/~adrian/mips/20130929-mips74k-4.diff

It turns out that with the XSTRING() stuff going on with COP0_SYNC, we
can't just put "sll zero,zero,3" in. It complains. So, use .word 0xc0 for
now.

Next, it exposed elf_trampoline.c - opt_global.h should be included before
the cpu register stuff.



-adrian



On 29 September 2013 07:57, Warner Losh <imp at bsdimp.com> wrote:

> More comments:
>
> For COP0_HAZARD, I'd add a pointer to See Mips Run, 2nd Ed in a comment on
> explaining why.
>
> You're also still using .word 0xc0 in cpuregs.h.
>
> Warner
>
> On Sep 29, 2013, at 4:50 PM, Adrian Chadd wrote:
>
> > Hi,
> >
> > Right:
> >
> > http://people.freebsd.org/~adrian/mips/20130929-mips74k-3.diff
> >
> >
> >
> > -adrian
> >
> >
> >
> > On 29 September 2013 07:43, Warner Losh <imp at bsdimp.com> wrote:
> > I'd be tempted to use 'sll zero, 3' instead of '.word 0xc0' and define a
> macro for it. Why 'sll zero,3' instead of ehb? It allows us to use it on
> older MIPS platforms as well... (because it will assemble in other modes,
> not for binutils issues)...
> >
> > Speaking of which, I'd also change the last 'nop' on the HAZARD_DELAY
> and ITLBNOPFIX to be 'sll zero, 3' as well. This will be an appropriate nop
> on older kit, as well as 'fail safe' when someone starts to cope with newer
> compilers.  Ditto COP0_SYNC.
> >
> > On Sep 29, 2013, at 4:37 PM, Adrian Chadd wrote:
> >
> > > grr, wrong list.
> > >
> > > also, try this:
> > >
> > > http://people.freebsd.org/~adrian/mips/20130929-mips74k-2.diff<
> http://people.freebsd.org/~adrian/mips/20130929-mips74k-1.diff>
> > >
> > >
> > >
> > > -adrian
> > >
> > > ---------- Forwarded message ----------
> > > From: Adrian Chadd <adrian at freebsd.org>
> > > Date: 29 September 2013 04:38
> > > Subject: [rfc] mips74k/ar9344 support
> > > To: "freebsd-wireless at freebsd.org" <freebsd-wireless at freebsd.org>
> > >
> > >
> > > Hi!
> > >
> > > Here's an initial hacked up patch to get the AR9344 to mountroot> .
> > >
> > > (Which isn't true - it panics due to missing PHY setup on if_arge;
> I'll fix
> > > that up soon.)
> > >
> > > http://people.freebsd.org/~adrian/mips/20130929-mips74k-1.diff
> > >
> > > The specific changes:
> > >
> > > * add CPU_MIPS24KC and CPU_MIPS74KC
> > > * mips32r2 CPUs require an EHB as a hazard for things, rather than NOPs
> > > * mips74k cores have a different CCA (cache coherency attributes) than
> the
> > > default - I lifted this from the netbsd mips support.
> > >
> > > now, the ar71xx CPUs are all currently marked as CPU_MIPS4KC. I'll
> follow
> > > this up with a commit to change that. There may be things we can
> optimise
> > > in the CPU_MIPS24KC case.
> > >
> > > Warner and I have started talking about how to properly fix all of the
> > > hazard handling. We'll discuss that later.
> > >
> > > I'd like to commit this to -HEAD so people wishing to hack on mips74k
> > > platforms can do stuff. Does anyone have any issues with the above?
> > >
> > > Thanks,
> > >
> > >
> > >
> > > -adrian
> > > _______________________________________________
> > > freebsd-mips at freebsd.org mailing list
> > > http://lists.freebsd.org/mailman/listinfo/freebsd-mips
> > > To unsubscribe, send any mail to "freebsd-mips-unsubscribe at freebsd.org
> "
> >
> >
>
>