Review

[M. Warner Losh]

In message: <AANLkTil54b-Ige8jAzrugOLkoUwSNXCVvm_Xf9Xs56wj at mail.gmail.com>
            "Jayachandran C." <c.jayachandran at gmail.com> writes:
: On Fri, Jul 16, 2010 at 3:49 AM, M. Warner Losh <imp at bsdimp.com> wrote:
: > OK.  Please find enclosed a minor cleanup diff for assembler files.
: > It moves ITLBNOPFIX and HAZARD_DELAY into a common header, as well as
: > replacing MIPS_CPU_NOP_DELAY with HAZARD_DELAY.
: >
: > The only real change is increasing the number of nops in a few places
: > from 4 to 5.
: >
: > This is in preparation for making these (a) much shorter and (b)
: > optimizing for specific CPUs...  mips32/mips64 define ssnop to deal
: > with the super-scaler effects (so ITLBNOPFIX can be shorter), and
: > mips32r2 and mips64r2 have eh, which can help with HAZARD_DELAY.
: >
: > The latter will need some careful study of the docs to make sure that
: > the proper number of instructions are executed (which is why I'm not
: > doing it yet :).  The former is just shuffling deck chairs, so should be
: > invisible to people.
: >
: > Comments?
: 
: There is a mips_barrier() in cpufunc.h too which does similar things -
: and is confusingly named - we can to get rid of that too in a similar
: way.

Yea, there's similar things in that file to the other stuff...

: Another cleanup I wanted to do for sometime is to get the status
: register settings into a header files and avoid the ifdef everywhere.

I've wanted that too....

: Maybe cpuregs.h (or cpufunc.h) can add cpu_xlr.h/cpu_octeon.h etc
: which will have hazard/status/extra registers for the specific cpu.

Yea, that's a good idea, I think...

There's also lots of places we disable interrupts by writing to
STATUS, but that could be dealt with EI or DI...

Warner

: Thanks,
: JC.
: 
: