Broadcom MIPS progress

[Bruce M. Simpson]

Bruce M. Simpson wrote:
>
> This may happen later in the week. I had problems teaching mips nexus 
> to allocate global memory map space for hard-wired children (siba0). 
> Tommorrow I'll focus on getting the enumeration working so that the 
> cores on the Sentry5 siba backplane may be detected and configured.

Cores on Sentry5 backplane are now enumerated. Code is checked into p4. 
Sample output (note that the siba0 device is probed with a hard-wired 
hint, and the allocation is then retried once the aperture to map all 
devices is discovered):

nexus0: <MIPS32 root nexus>
nexus_hinted_child: discovered hinted child siba0 at maddr 0x18000000(4096)
nexus_set_resource: entry (0x8029e100, 0x8029fc80, 3, 32, 0x18000000, 4096)
clock0: <Generic MIPS32 ticker> on nexus0
nexus_alloc_resource: entry (0x8029e100, 0x8029fd00, 1, 0x801c54d8, 0x5, 
0x5, 1, 2)
nexus_alloc_resource: requested rid is 0
clock0: [FILTER]
nexus_alloc_resource: entry (0x8029e100, 0x8029fc80, 3, 0x801c54b8, 0, 
0xffffffff, 1, 2)
nexus_alloc_resource: requested rid is 32
siba0: start 18000000 len 00001000
siba0: idlo = 100422dd
siba0: idhi = 42438005
siba0:  chipcore id = 00000800
siba0: ccid = 00015365, cc_id = 5365, cc_rev = 0001
siba0: 7 cores detected.
nexus_release_resource: entry
nexus_alloc_resource: entry (0x8029e100, 0x8029fc80, 3, 0x801c54b8, 
0x18000000, 0x18006fff, 28672, 2)
nexus_alloc_resource: requested rid is 32
siba0: after remapping: start 18000000 len 00007000
nexus_set_resource: entry (0x8029e100, 0x8029fc80, 3, 32, 0x18000000, 28672)
siba0: <Sonics SiliconBackplane rev 2.3> at mem 0x18000000-0x18006fff on 
nexus0
siba_attach: entry
siba0: core 0: ChipCommon rev 05
siba0: child is 0x8029fb80
siba0: core 1: Ethernet core rev 06
siba0: child is 0x8029fb00
siba0: core 2: IPSEC accelerator rev 01
siba0: child is 0x8029fa80
siba0: core 3: USB host controller rev 02
siba0: child is 0x8029fa00
siba0: core 4: PCI host interface rev 08
siba0: child is 0x8029f980
siba0: core 5: MIPS 3302 core rev 01
siba0: child is 0x8029f900
siba0: core 6: SDRAM/DDR controller rev 00
siba0: child is 0x8029f880
Timecounter "MIPS32" frequency 200000000 Hz quality 800
Timecounters tick every 10.000 msec

I am now scratching my head over how to attach child devices.

It seems likely that a full pci-style bus implementation will be needed 
in siba (instance variables, devinfo etc) as it is likely that 
architecture-independent code can be reused; in particular, ubsec(4), 
uart(4) and bfe(4) for the onboard devices. I believe the onboard USB 
host controller is OHCI.

Regards,
BMS