ISDN4BSD (HPS version) is going into ports

[Andreas Longwitz]

Hans Petter Selasky wrote:

1. Problem:  "last byte" on incomig D-channel frames:

> Can you add prints to track the "sc->sc_d1r_fifo_keep_len" and "sc-
> sc_d1r_fifo_strip_len" variables?

Yes. With the following two prints

     avm_pci_chip_read(sc,(f->fm.h.Zdata),ptr,len);

     sc->sc_d1r_fifo_keep_len -= len;
     if (bootverbose == 2) {
        IHFC_ERR("len=%d, sc->sc_d1r_fifo_keep/strip_len=%d/%d\n", len,
                 sc->sc_d1r_fifo_keep_len, sc->sc_d1r_fifo_strip_len);
     }
and


   if (temp != 0) {
       sc->sc_d1r_fifo_strip_len = 1;
       sc->sc_d1r_fifo_keep_len = temp - 1;
   } else {
       sc->sc_d1r_fifo_strip_len = 0;
       sc->sc_d1r_fifo_keep_len = 0;
   }
   if (bootverbose == 2) {
      IHFC_ERR("temp=%d, sc->sc_d1r_fifo_keep/strip_len=%d/%d\n", temp,
               sc->sc_d1r_fifo_keep_len, sc->sc_d1r_fifo_strip_len);
   }

I got
avm_pci_chip_status_read: temp=5, sc->sc_d1r_fifo_keep/strip_len=4/1
avm_pci_fifo_read: len=5, sc->sc_d1r_fifo_keep/strip_len=255/1
avm_pci_chip_status_read: temp=9, sc->sc_d1r_fifo_keep/strip_len=8/1
avm_pci_fifo_read: len=9, sc->sc_d1r_fifo_keep/strip_len=255/1
avm_pci_chip_status_read: temp=4, sc->sc_d1r_fifo_keep/strip_len=3/1
avm_pci_fifo_read: len=4, sc->sc_d1r_fifo_keep/strip_len=255/1
avm_pci_chip_status_read: temp=5, sc->sc_d1r_fifo_keep/strip_len=4/1
avm_pci_fifo_read: len=5, sc->sc_d1r_fifo_keep/strip_len=255/1
avm_pci_chip_status_read: temp=5, sc->sc_d1r_fifo_keep/strip_len=4/1
avm_pci_fifo_read: len=5, sc->sc_d1r_fifo_keep/strip_len=255/1
avm_pci_chip_status_read: temp=13, sc->sc_d1r_fifo_keep/strip_len=12/1
avm_pci_fifo_read: len=13, sc->sc_d1r_fifo_keep/strip_len=255/1
avm_pci_chip_status_read: temp=5, sc->sc_d1r_fifo_keep/strip_len=4/1
avm_pci_fifo_read: len=5, sc->sc_d1r_fifo_keep/strip_len=255/1
avm_pci_chip_status_read: temp=5, sc->sc_d1r_fifo_keep/strip_len=4/1
avm_pci_fifo_read: len=5, sc->sc_d1r_fifo_keep/strip_len=255/1
avm_pci_chip_status_read: temp=16, sc->sc_d1r_fifo_keep/strip_len=15/1
avm_pci_fifo_read: len=16, sc->sc_d1r_fifo_keep/strip_len=255/1
avm_pci_chip_status_read: temp=12, sc->sc_d1r_fifo_keep/strip_len=11/1
avm_pci_fifo_read: len=12, sc->sc_d1r_fifo_keep/strip_len=255/1
avm_pci_chip_status_read: temp=29, sc->sc_d1r_fifo_keep/strip_len=28/1
avm_pci_fifo_read: len=29, sc->sc_d1r_fifo_keep/strip_len=255/1

> i4b_filter.h is not the right place to do this.

I agree, should be done in i4b_avm_pci.h.

2. Problem: B-channel does not work.

> Possibly some FIFO status bits are not cleared like they should, and then the 
> stream stops.
> I know that some chips have a filter which stops the stream on HDLC idle 
> bytes.
> It might also be worth to try dumping the register from which the HSCX_LEN 
> comes from, if it is 2x32=64 bytes, because I mask that value with 0x1F.

I did not find a masking with 0x1F, or do you mean 0x3F (typing error) ?

I will do more work on B-channel analysis. It would be very helpful for
me, if you can give an answer to the following question:

After the B-channel is established, the other side starts sending the
following data packet (from isdndecode of the other side):

-- TE->NT - unit:00  frame:351318 - time:10.01 11:34:12.595168 -
                                              length:18 ----
B01:000  ff 03 c0 21 01 d8 00 0e    05 06 31 13 cd b3 03 04
B01:010  c0 23

What should we read in avm_pci_b_status_read() with

           if(temp == 0) temp = 32;
            /* read FIFO */
            bus_space_read_multi_4(t, h, offset + HSCX_FIFO,
                (u_int32_t *)sc->sc_buffer, (temp + 3) / 4);

if everything works correct and how many interrupts can we expect for
the message of 18 bytes ?


-- 
Dr. Andreas Longwitz

Data Service GmbH
Beethovenstr. 2A
23617 Stockelsdorf
Amtsgericht Lübeck, HRB 318 BS
Geschäftsführer: Wilfried Paepcke, Dr. Andreas Longwitz, Josef Flatau