i386/126525: Extended PCI Configuration register (>= 0x100) not
enabled
Gavin Atkinson
gavin at FreeBSD.org
Fri Aug 15 13:10:04 UTC 2008
The following reply was made to PR i386/126525; it has been noted by GNATS.
From: Gavin Atkinson <gavin at FreeBSD.org>
To: bug-followup at FreeBSD.org
Cc:
Subject: Re: i386/126525: Extended PCI Configuration register (>= 0x100) not
enabled
Date: Fri, 15 Aug 2008 14:03:49 +0100 (BST)
Patch follows.
Index: src/sys/i386/pci/pci_cfgreg.c
===================================================================
RCS file: /home/ncvs/src/sys/i386/pci/pci_cfgreg.c,v
retrieving revision 1.126
diff -u -r1.126 pci_cfgreg.c
--- src/sys/i386/pci/pci_cfgreg.c 28 Nov 2007 22:22:05 -0000 1.126
+++ src/sys/i386/pci/pci_cfgreg.c 15 Aug 2008 11:38:42 -0000
@@ -163,14 +163,37 @@
vid = pci_cfgregread(0, 0, 0, PCIR_VENDOR, 2);
did = pci_cfgregread(0, 0, 0, PCIR_DEVICE, 2);
if (vid == 0x8086) {
- if (did == 0x3590 || did == 0x3592) {
+ switch (did) {
+ case 0x3590:
+ case 0x3592:
/* Intel 7520 or 7320 */
pciebar = pci_cfgregread(0, 0, 0, 0xce, 2) << 16;
pciereg_cfgopen();
- } else if (did == 0x2580 || did == 0x2584) {
- /* Intel 915 or 925 */
+ break;
+ case 0x2580:
+ case 0x2584:
+ case 0x2590:
+ /* Intel 915, 925, 915GM/PM/GMS/GME or 910GML/GMLE */
pciebar = pci_cfgregread(0, 0, 0, 0x48, 4);
pciereg_cfgopen();
+ break;
+ case 0x25d8:
+ case 0x25d0:
+ case 0x25d4:
+ /* Intel 5000P/Z/V */
+ pciebar = pci_cfgregread(0, 16, 0, 0x64, 4);
+#ifndef PAE
+ if (pciebar >= 0x10000) {
+ printf("%s: Memory mapped PCI configuration "
+ "area base 0x%08x too high\n",
+ __FUNCTION__, pciebar);
+ pciebar = 0;
+ break;
+ }
+#endif
+ pciebar = pciebar << 16;
+ pciereg_cfgopen();
+ break;
}
}
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