i386/89296: Spurious atapci1: failed to enable memory mapping! on ICH7

[Francis Dupont]

>Number:         89296
>Category:       i386
>Synopsis:       Spurious atapci1: failed to enable memory mapping! on ICH7
>Confidential:   no
>Severity:       non-critical
>Priority:       low
>Responsible:    freebsd-i386
>State:          open
>Quarter:        
>Keywords:       
>Date-Required:
>Class:          sw-bug
>Submitter-Id:   current-users
>Arrival-Date:   Sat Nov 19 21:30:33 GMT 2005
>Closed-Date:
>Last-Modified:
>Originator:     Francis Dupont
>Release:        6.0-RELEASE on i386/amd64
>Organization:
GET/ENST Bretagne
>Environment:
FreeBSD diane.ipv6.rennes.enst-bretagne.fr 6.0-RELEASE FreeBSD 6.0-RELEASE #0: Wed Nov  2 19:07:38 UTC 2005     root at rat.samsco.home:/usr/obj/usr/src/sys/GENERIC  amd64
              
>Description:
On a recent Dell Optiplex 620 (i945G, ICH7 PATA+SATA 150) boot gives a spurious error:
atapci1: failed to enable memory mapping!
which seems to have no bad consequence... BTW the atapci1 (SATA part of the ICH7, atapci0 is the PATA)
has no memory map?
Here are the related bootverbose logs:

found-> vendor=0x8086, dev=0x27df, revid=0x01
        bus=0, slot=31, func=1
        class=01-01-8a, hdrtype=0x00, mfdev=0
        cmdreg=0x0005, statreg=0x0288, cachelnsz=0 (dwords)
        lattimer=0x00 (0 ns), mingnt=0x00 (0 ns), maxlat=0x00 (0 ns)
        intpin=a, irq=11
        map[20]: type 4, range 32, base 0000ffa0, size  4, enabled
pcib0: matched entry for 0.31.INTA
pcib0: slot 31 INTA hardwired to IRQ 16
found-> vendor=0x8086, dev=0x27c0, revid=0x01
        bus=0, slot=31, func=2
        class=01-01-8f, hdrtype=0x00, mfdev=0
        cmdreg=0x0007, statreg=0x02b0, cachelnsz=0 (dwords)
        lattimer=0x00 (0 ns), mingnt=0x00 (0 ns), maxlat=0x00 (0 ns)
        intpin=c, irq=5
        powerspec 2  supports D0 D3  current D0
        map[10]: type 4, range 32, base 0000fe00, size  3, enabled
        map[14]: type 4, range 32, base 0000fe10, size  2, enabled
        map[18]: type 4, range 32, base 0000fe20, size  3, enabled
        map[1c]: type 4, range 32, base 0000fe30, size  2, enabled
        map[20]: type 4, range 32, base 0000fea0, size  4, enabled
pcib0: matched entry for 0.31.INTC
pcib0: slot 31 INTC hardwired to IRQ 20

atapci0: <Intel ICH7 UDMA100 controller> port 0x1f0-0x1f7,0x3f6,0x170-0x177,0x37
6,0xffa0-0xffaf irq 16 at device 31.1 on pci0
atapci0: Reserved 0x10 bytes for rid 0x20 type 4 at 0xffa0
ata0: <ATA channel 0> on atapci0
atapci0: Reserved 0x8 bytes for rid 0x10 type 4 at 0x1f0
atapci0: Reserved 0x1 bytes for rid 0x14 type 4 at 0x3f6
ata0: reset tp1 mask=03 ostat0=50 ostat1=00
ata0: stat0=0x00 err=0x01 lsb=0x14 msb=0xeb
ata0: stat1=0x00 err=0x00 lsb=0x00 msb=0x00
ata0: reset tp2 stat0=00 stat1=00 devices=0x4<ATAPI_MASTER>
ata0: [MPSAFE]
ata1: <ATA channel 1> on atapci0
atapci0: Reserved 0x8 bytes for rid 0x18 type 4 at 0x170
atapci0: Reserved 0x1 bytes for rid 0x1c type 4 at 0x376
ata1: reset tp1 mask=00 ostat0=ff ostat1=ff
ata1: [MPSAFE]
atapci1: <Intel ICH7 SATA150 controller> port 0xfe00-0xfe07,0xfe10-0xfe13,0xfe20
-0xfe27,0xfe30-0xfe33,0xfea0-0xfeaf irq 20 at device 31.2 on pci0
atapci1: Reserved 0x10 bytes for rid 0x20 type 4 at 0xfea0
atapci1: [MPSAFE]
atapci1: failed to enable memory mapping!
ata2: <ATA channel 0> on atapci1
atapci1: Reserved 0x8 bytes for rid 0x10 type 4 at 0xfe00
atapci1: Reserved 0x4 bytes for rid 0x14 type 4 at 0xfe10
ata2: reset tp1 mask=01 ostat0=80 ostat1=00
ata2: stat0=0x50 err=0x01 lsb=0x00 msb=0x00
ata2: reset tp2 stat0=50 stat1=00 devices=0x1<ATA_MASTER>
ata2: [MPSAFE]
ata3: <ATA channel 1> on atapci1
atapci1: Reserved 0x8 bytes for rid 0x18 type 4 at 0xfe20
atapci1: Reserved 0x4 bytes for rid 0x1c type 4 at 0xfe30
ata3: reset tp1 mask=00 ostat0=ff ostat1=00
ata3: [MPSAFE]

              
>How-To-Repeat:
Boot 6.0-RELEASE on a PC with an ICH7 (I have no different recent PCs). Note ICH6 and 6300ESB boxes
are available in my lab for more testing.              
>Fix:
I don't know what is the problem. I can change the error in a panic in order to get more details
if nobody finds quickly.
BTW some specific code for the ICH6 should be extended to ICH7 (cf reset code in dev/ata/ata-chipset.c)

>Release-Note:
>Audit-Trail:
>Unformatted: