kern/98388: [ata] FreeBSD 6.1 - WDC WD1200JS SATA II disks are seen as older SATA

Jeremy Chadwick koitsu at FreeBSD.org
Thu Aug 14 12:47:55 UTC 2008


On Thu, Aug 14, 2008 at 03:56:32PM +0400, Andrey V. Elsukov wrote:
> sam wrote:
>>> Can you apply attached patch, rebuild your kernel, reboot in verbose
>>> mode and show /var/run/dmesg.boot ?
>>>
>> http://cs.udmvt.ru/files/temp/dmesg.boot_0814
>
> It seems that driver couldn't allocate IO resource at BAR5 and
> without this resource it can't read SATA Status register and
> determine negotiated speed. I think the problem is in your BIOS.
> If your BIOS doesn't have any AHCI or RAID specific options
> I don't know how correctly fix this problem.

Andrey, please correct me if I'm wrong here.  I'm not familiar these
kernel functions, but assuming pci_read_config() handles proper byte
order, and device_printf() prints it in correct order, then I believe
you may be missing something important.

I haven't looked for any product Errata, but see Section 12.1 below
(specific to ICH7): http://www.intel.com/assets/pdf/datasheet/307013.pdf

Index 0x94 = SIR   (SATA Index Register)
Index 0xAC = SCAP1 (SATA Capability Register 1)

I'm not sure why you called SIR "SCRD" in your device_printf().  For
SIR's description, see Section 12.1.35.  For SCAP1, see Section 12.1.39.

The SIR value is 0x40000180, broken down into binary nibbles:

  %0100 0000 0000 0000 0000 0001 1000 0000
    ^
    ^
This indicates bit 30 is set.  According to Intel's docs, bit 30
disables SCAP0 and SCAP1, thus will cause them to always return 0:


Bit 30
SATA Capability Registers Disable (SCRD)

When this bit is set, the SATA Capability Registers are disabled. That
is, SATA Capability Registers 0 and 1 are both changed to Read Only with
the value of 00000000h. Also, the Next Capability bits in the PCI Power
Management Capability Information Register (D31:F2;Offset 70h bits 15:8)
are changed to 00h, to indicate that the PCI Power Management Capability
structure is the last PCI capability structure in the SATA controller.
When this bit is cleared, the SATA Capability Registers are enabled.


A quick glance seems to indicate we're not initialising some of the SATA
registers at all, case in point.

Someone should make a patch for the user that zeros out bit 30 of SIR,
then check the xBAR and LBAR values; zeroing bit 30 might get him
SATA300 support (I haven't looked at the rest of the FreeBSD ATA code
yet).

-- 
| Jeremy Chadwick                                jdc at parodius.com |
| Parodius Networking                       http://www.parodius.com/ |
| UNIX Systems Administrator                  Mountain View, CA, USA |
| Making life hard for others since 1977.              PGP: 4BD6C0CB |



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