Weird PCI interrupt delivery problem (resolution, sort of)

[Craig Boston]

On Thu, Jan 19, 2006 at 10:17:39PM -0700, Scott Long wrote:
> This points to a bus coherency problem.  I wonder if your BIOS is
> incorrectly setting the memory region of the apics as cachable.  You'll
> want to bug Baldwin about this.

I CC-ed him on my post since he was working with me on the problem
before.  For some reason the Cc: header got wiped out when it went to
the list (but I checked my server logs and it did deliver a copy of the
message to him).

Craig