Fwd: 5-STABLE kernel build with icc broken

[jason henson]

Peter Jeremy wrote:

>On Mon, 2005-Mar-28 23:23:19 -0800, David Leimbach wrote:
>  
>
>>meant to send this to the list too... sorry
>>    
>>
>>>Are you implying DragonFly uses FPU/SIMD?  For that matter does any kernel?
>>>      
>>>
>>I believe it does use SIMD for some of it's fast memcopy stuff for
>>it's messaging system
>>actually.  I remember Matt saying he was working on it.
>>
>>http://leaf.dragonflybsd.org/mailarchive/kernel/2004-04/msg00262.html
>>    
>>
>
>That's almost a year ago and specifically for the amd64.  Does anyone
>know what the results were?
>
>  
>
>>If you can manage the alignment issues it can be a huge win.
>>    
>>
>
>For message passing within the kernel, you should be able to mandate
>alignment as part of the API.
>
>I see the bigger issue being the need to save/restore the SIMD
>engine's state during a system call.  Currently, this is only saved on
>if a different process wants to use the SIMD engine.  For MMX, the
>SIMD state is the FPU state - which is non-trivial.  The little
>reading I've done suggests that SSE and SSE2 are even larger.
>
>Saving the SIMD state would be more expensive that using integer
>registers for small (and probably medium-sized) copies.
>
>  
>
Later in that thread they discuss skipping the restore state to make 
things faster.  The minimum buffer size they say this will be good for 
is between 2-4k.  Does this make sense, or am I showing my ignorance?

http://leaf.dragonflybsd.org/mailarchive/kernel/2004-04/msg00264.html