Low umass performance with USB 2.0 ports

[Hans Petter Selasky]

On Wednesday 31 August 2005 23:21, Scott Long wrote:
> >>
> >>Actually, I just peeked inside the Linux EHCI code and it does a dummy
> >>read immediately after writing to the status register:
> >>
> >>         /* clear (just) interrupts */
> >>         writel (status, &ehci->regs->status);
> >>         readl (&ehci->regs->command);   /* unblock posted write */
> >>
> >>I wonder if that's the whole trick here.  Would someone be willing to
> >>try the attached patch instead of the one that Ian posted?
> >>
> >>Scott
> >
> > This is not documented in the EHCI chip specification.
>
> Flushing posted writes is something that all programmers of PCI devices
> should understand, so it usually isn't documented in device manuals.
>
> > There exists the
> > doorbell to ensure that the EHCI controller is finished with data
> > structures. Also I have noticed that the existing EHCI driver does not
> > always dequeue structures from the controller before accessing them.
>
> Can you point to an example here?

In the official USB system, when an endpoint is opened, a QH structure is  
allocated and inserted into the USB controller's schedule. After that the 
EHCI driver will just write new values to that structure, while it is still 
scheduled. In my opinion you should unqueue this structure and wait for 
doorbell, before touching it.

>
> > If Scott's patch doesn't work, could you have tried to install the
> > following (compiles on FreeBSD 5/6/7):
>
> Yeah, looks like my guess was wrong.
>
> Scott

--HPS