Intel i8xx watchdog driver

[Doug Ambrisko]

Don Bowman writes:
| The Intel ICH3 (and probably all) has the feature it can
| issue an SMI on first count-down to 0, then a hard reset
| on 2nd. What we did was implement an SMM handler (in bios)
| that, when called due to watchdog, issued an NMI and did
| a return from smm.
| In FreeBSD, an NMI handler caught this (sometimes :),
| poke around to send a bit of data out to serial, moved the
| timer to the maximum value without reseting it, and then
| called panic [after mucking with cpl etc to pretend to
| own all locks :]
| If the NMI handler didn't get run, the hardware counted
| to 0 again and reset.
| If the NMI handler did get run, and then wedged somehow
| in the panic or whatever, the hardware counted to 0,
| and the system reset.
| If all worked well, you got a core, but at a minimum
| the system reset, and usually you got at least the
| serial output of some of the 'why'.
| 
| The SMI is non-maskable (and higher priority than NMI).

That sounds pretty cool.  There was some bits in the ICH that
prevented an NMI to get to the CPU unless set a certain way.
I was generating an NMI via the PCI but.  BTW you can do the
paper clip trick on PCI.  The ICH seemed to be only one shot so
it de-bounced it.  I could get multiple on a CPU NMI pin. 

How hard is to setup and trap SMI via a FreeBSD only solution?

I haven't really looked much at that area but sounds useful.

Doug A.