TL-WR1043: switch

[Adrian Chadd]

It looks like the code hard-codes:

#define SCL_PIN         0       /* gpiobus mapped pin 6 */
#define SDA_PIN         1       /* gpiobus mapped pin 7 */

You could add some printf()s to sys/mips/atheros/ar71xx_gpio.c and log
which GPIO pins are being twiddled. That'd answer your question
immediately.

Are they around the correct way? The wiki says that pin 18 is data and
pin 19 is clock, but gpioiic has clock as pin '0' and data as pin '1'.
You could try swapping the values of SCL_PIN and SDA_PIN.

Ideally the gpiobus assignment above should specify which pins are
clock and data via hints, eg:

hint.gpioiic.0.at="gpiobus0"
hint.gpioiic.0.pins=0xc0000  # Which pin range is being requested;
this is parsed by the code in gpiobus?
hint.gpioiic.0.datapin=0        # Relative to the above pin set
hint.gpioiic.0.clockpin=1       # Relative to the above pin set


Adrian