Memory barrier
Leonardo Fogel
leonardofogel at yahoo.com.br
Sun Sep 6 13:54:03 UTC 2015
Hi.
Please, what are the correct barriers for the following cases?
Case 1:
bus_write_1(region_0, ...);
/* barrier here */
DELAY(some_time);
Case 2:
bus_write_1(region_0, ...);
/* barrier here */
bus_write_1(region_2, ...);
In the first one, I want the write to reach the device before the thread busy-waits. As I understand it, bus_space_barrier(9) is not adequate, because it does not prevent the processor from executing instructions (or load/store to RAM) before the write completes.
In the second one, I want the write to a device (e.g. power management) to complete before the write to another starts/completes. Again, bus_space_barrier() seems not to be adequate because it can not cover two regions.
Thank you for your time.
Leonardo
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