bus_dma coalesce advice

[JD Louw]

Hi,

I have a Xilinx FPGA PCIe DMA design that I'd like to get going on
FreeBSD. I'd like some advice on the best practice of the bus_dma
functions. Specifically, I'd like to understand how best to coalesce
multiple DMA transactions.

Using the bus_dma_tag_create and bus_dmamem_alloc functions I create
256 contiguous descriptors.

	bus_dma_tag_create(NULL, 		/* parent */
		4,				/* alignment */
		0,				/* bounds */
		BUS_SPACE_MAXADDR,		/* lowaddr */
		BUS_SPACE_MAXADDR,		/* highaddr */
		NULL, NULL,			/* filter, filterarg */
		256*sizeof(descriptor),		/* maxsize */
		1,				/* nsegments */
		256*sizeof(descriptor),		/* maxsegsize */
		BUS_DMA_ALLOCNOW,		/* flags */
		NULL, NULL,			/* lockfunc, lockarg */
		&desc_tag);			/* dmat */

I then create another bus_dma_tag for the data:

	bus_dma_tag_create(NULL, 		/* parent */
		4,				/* alignment */
		0,				/* bounds */
		BUS_SPACE_MAXADDR,		/* lowaddr */
		BUS_SPACE_MAXADDR,		/* highaddr */
		NULL, NULL,			/* filter, filterarg */
		0xFFFFF,			/* maxsize - 1MB */
		256,				/* nsegments */
		0x1000,				/* maxsegsize - 4KB*/
		BUS_DMA_ALLOCNOW,		/* flags */
		NULL, NULL,			/* lockfunc, lockarg */
		&data_tag);			/* dmat */

Now my question: In order to batch several mbufs/uios in into the 256
descriptors I'd like to do multiple bus_dmamap_loads on the data tag.
But reading the bus_dmamap_load_mbuf/uio code it looks like this is
not a good idea. Each mapping operation does not subtract its nsegment
count from the tag maximum nsegment count, so at some point
bus_dmamap_load will overrun my 256 descriptors.

Do I need to allocate a separate set of descriptors for each bus_dmamapping?

Any advice much appreciated,

JD