Timeda 8-multiport adapter: only 2 ports available

Boris Samorodov bsam at ipt.ru
Fri Dec 12 10:37:35 UTC 2008


Marcel Moolenaar <xcllnt at mac.com> writes:
> On Dec 11, 2008, at 10:00 AM, Boris Samorodov wrote:
>> Marcel Moolenaar <xcllnt at mac.com> writes:
>>
>>> Summary:
>>>
>>> port 1: IO=0xec00; IIR=0x1, 0xc1; MCR=0x0, 0x8
>>> port 2: IO=0xec08; IIR=0x1, 0xc1; MCR=0x0, 0x8
>>> port 3: IO=0xe880; IIR=0x1; MCR=0x40
>>> port 4: IO=0xe888; IIR=0x1; MCR=0x40
>>> port 5: IO=0xe800; IIR=0x1; MCR=0x40
>>> port 6: IO=0xe480; IIR=0x1; MCR=0x40
>>> port 7: IO=0xe400; IIR=0x1; MCR=0x40
>>> port 8: IO=0xe080; IIR=0x1; MCR=0x40
>>>
>>> For ports 3-8, the MCR has a value that's not liked by
>>> uart(4). I think we need to know what that value means.
>>> Are the ports disabled? Are they in a non-standard
>>> mode? Is it just a non-standard status bit that's set
>>> and we should ignore it? etc...
>>>
>>> Boris: can you apply the following patch and see if
>>> uart(4) attaches to all ports? If yes, can you see
>>> if those ports actually work as well?
>>
>> All ports were attached. But ports 3-8 don't work as axpected.
>> I see garbage when connecting via those ports.
>
> Ok, so it's more than just a non-standard status bit that
> can be ignored :-/
>
> Unfortunately, I don't have any of their hardware, nor any
> documentation...

Seems I've found something interesting. Here is a procedure to
initialize ports from producer's sources:
-----
static int golden_startup(struct snx_port *port)
{   
    struct golden_port *up = (struct golden_port *)port;

    up->capabilities = uart_config[up->port.type].flags;
    up->mcr = 0;

    if (up->capabilities & UART_CLEAR_FIFO)
    {   
        WRITE_UART_FCR(up, UART_FCR_ENABLE_FIFO);
        WRITE_UART_FCR(up, UART_FCR_ENABLE_FIFO | UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT);
        WRITE_UART_FCR(up, 0);
    }

    (void) READ_UART_LSR(up);
    (void) READ_UART_RX(up);
    (void) READ_UART_IIR(up);
    (void) READ_UART_MSR(up);


    if (!(up->port.flags & UPF_BUGGY_UART) && (READ_UART_LSR(up) == 0xff))
    {   
        printk("GOLDEN Info : ttySNX%d: LSR safety check engaged!\n", up->port.line);
        return -ENODEV;
    }


    WRITE_UART_LCR(up, UART_LCR_WLEN8);

    if (up->port.type == PORT_SUN1699)
    {   
        up->ier = UART_IER_RLSI | UART_IER_RDI | SUN1699_CLK_DIVIDER_DISABLE;
    }
    else if (up->port.type == PORT_SUN1889)
    {   
        up->ier = UART_IER_RLSI | UART_IER_RDI;
    }
    else
    {   
        up->ier = UART_IER_RLSI | UART_IER_RDI;
    }

    WRITE_UART_IER(up, up->ier);

    (void) READ_UART_LSR(up);
    (void) READ_UART_RX(up);
    (void) READ_UART_IIR(up);
    (void) READ_UART_MSR(up);

    return 0;
}
-----

I may say that SUN1889 uarts are initialized like default. And indeed
two first ports work here. The card contains only one SUN1889 chip (for
two first ports). All other chips are SUN1699 which (better to say
serial ports) should be initialized with the flag
SUN1699_CLK_DIVIDER_DISABLE (0x10).

Don't know how/where to do it. :-(

For those curious source and headers may be found at:
ftp://ftp.ipt.ru/pub/sunix/golden_V1.08/golden/driver


WBR
-- 
Boris Samorodov (bsam)
Research Engineer, http://www.ipt.ru Telephone & Internet SP
FreeBSD committer, http://www.FreeBSD.org The Power To Serve


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