Call for re(4) TSO/VLAN testers
Pyun YongHyeon
pyunyh at gmail.com
Tue Nov 14 15:49:22 PST 2006
On Tue, Nov 14, 2006 at 07:50:22PM +0100, Pieter de Goeje wrote:
> On Tuesday 14 November 2006 01:01, Pyun YongHyeon wrote:
> > ATM re(4) uses still small number of Tx descriptors(i.e. 64 entries)
> > due to the hardware limitation of 8139C+. 8169 family can have
> > up to 1024 Tx descriptors. If we want to use more Tx descriptors
> > on 8169 the internal structure should be modified to support both
> > 8139C+ and 8169. I guess it would require major Tx path overhaul.
> > Because I have just plain PCI 8169 hardware I can't sure increasing
> > number of Tx descriptors on re(4) help Tx performance of the driver.
>
> So the 8169 has 64 Tx descriptors and the 8169S 1024?
>
All 8169 chipsets support 1024 Tx descriptors.
> (dmesg 6-stable)
> re0: <RealTek 8169S Single-chip Gigabit Ethernet> port 0xd000-0xd0ff mem
> 0xe8000000-0xe80000ff irq 17 at device 9.0 on pci0
> miibus0: <MII bus> on re0
> rgephy0: <RTL8169S/8110S media interface> on miibus0
> rgephy0: 10baseT, 10baseT-FDX, 100baseTX, 100baseTX-FDX, 1000baseTX,
> 1000baseTX-FDX, auto
>
> > I guess 64 Tx descriptors are not sufficient to saturate giga bit
> > link.
> > Would please try attached patch and report the performance of patched
> > re(4) driver?
>
> Where can I find this patch?
>
Attached.
--
Regards,
Pyun YongHyeon
-------------- next part --------------
Index: if_rlreg.h
===================================================================
RCS file: /pool/ncvs/src/sys/pci/if_rlreg.h,v
retrieving revision 1.60
diff -u -r1.60 if_rlreg.h
--- if_rlreg.h 1 Aug 2006 17:18:25 -0000 1.60
+++ if_rlreg.h 14 Nov 2006 23:13:33 -0000
@@ -541,6 +541,7 @@
#define RL_TDESC_CMD_UDPCSUM 0x00020000 /* UDP checksum enable */
#define RL_TDESC_CMD_IPCSUM 0x00040000 /* IP header checksum enable */
#define RL_TDESC_CMD_MSSVAL 0x07FF0000 /* Large send MSS value */
+#define RL_TDESC_CMD_MSSVAL_SHIFT 16 /* Large send MSS value shift */
#define RL_TDESC_CMD_LGSEND 0x08000000 /* TCP large send enb */
#define RL_TDESC_CMD_EOF 0x10000000 /* end of frame marker */
#define RL_TDESC_CMD_SOF 0x20000000 /* start of frame marker */
@@ -637,12 +638,12 @@
* due to the 8139C+. We need to put the number of descriptors in the ring
* structure and use that value instead.
*/
-#if !defined(__i386__) && !defined(__amd64__)
+#ifndef __NO_STRICT_ALIGNMENT
#define RE_FIXUP_RX 1
#endif
-#define RL_TX_DESC_CNT 64
-#define RL_RX_DESC_CNT RL_TX_DESC_CNT
+#define RL_TX_DESC_CNT 256
+#define RL_RX_DESC_CNT 64
#define RL_RX_LIST_SZ (RL_RX_DESC_CNT * sizeof(struct rl_desc))
#define RL_TX_LIST_SZ (RL_TX_DESC_CNT * sizeof(struct rl_desc))
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