ATA regression

[Ruslan Ermilov]

Hi Soren,

Finally, I had time today to track it down to a single
commit.  So, the following change breaks my Promise
SATA150 controller:

: sos         2004-12-08 10:02:41 UTC
: 
:   FreeBSD src repository
: 
:   Modified files:
:     sys/dev/ata          ata-chipset.c ata-pci.h 
:   Log:
:   Add first shot on support for the new Promise SATAII chips.
:   
:   HW donated by:  pil.dk
:   
:   Revision  Changes    Path
:   1.93      +109 -49   src/sys/dev/ata/ata-chipset.c
:   1.36      +10 -2     src/sys/dev/ata/ata-pci.h

Here's the difference in "ata" output before and after
this commit:

--- ata.ok	Thu Dec 23 23:52:37 2004
+++ ata.bad	Fri Dec 24 00:01:53 2004
@@ -1,12 +1,14 @@
 atapci0: <nVidia nForce3 UDMA133 controller> port 0xffa0-0xffaf,0x376,0x170-0x177,0x3f6,0x1f0-0x1f7 at device 8.0 on pci0
 ata0: channel #0 on atapci0
 ata1: channel #1 on atapci0
 atapci1: <Promise PDC20378 SATA150 controller> port 0xd000-0xd07f,0xd400-0xd40f,0xd800-0xd83f mem 0xfc960000-0xfc97ffff,0xfc99f000-0xfc99ffff irq 5 at device 8.0 on pci1
 atapci1: failed: rid 0x20 is memory, requested 4
 ata2: channel #0 on atapci1
 ata3: channel #1 on atapci1
 ata4: channel #2 on atapci1
 ad0: 76319MB <ST380011A/3.04> [155061/16/63] at ata0-master UDMA100
 ata1-slave: DMA limited to UDMA33, non-ATA66 cable or device
 acd0: CDRW <COM4824/VER 1.01> at ata1-slave UDMA33
-ad8: 76319MB <ST380011A/3.04> [155061/16/63] at ata4-master UDMA100
+ata4-master: FAILURE - ATA_IDENTIFY timed out
+ata4-master: FAILURE - ATA_IDENTIFY timed out
+ata4-master: FAILURE - ATA_IDENTIFY timed out

As others have pointed out already, the next commit

: sos         2004-12-08 11:16:33 UTC
: 
:   FreeBSD src repository
: 
:   Modified files:
:     sys/dev/ata          ata-queue.c 
:   Log:
:   Reset timeout when we are back from interrupt.
:   
:   Revision  Changes    Path
:   1.41      +3 -0      src/sys/dev/ata/ata-queue.c

made things even worse (the system now panics).


Cheers,
-- 
Ruslan Ermilov
ru at FreeBSD.org
FreeBSD committer
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