Is the TSC timecounter safe on SMP system?
Andrew Gallatin
gallatin at cs.duke.edu
Fri Aug 13 10:28:57 PDT 2004
John Baldwin writes:
> On Friday 13 August 2004 12:49 pm, Andrew Gallatin wrote:
> > I have a system where the TSC timecounter is quite a bit more accurate
> > (or perhaps its just much cheaper) than the ACPI timecounter. This is a
> > single CPU, HTT system running an SMP kernel.
> >
> > A simple program which calls gettimeofday() in a tight loop, looking
> > for the microseconds to change sees ~998,000 microsecond updates/sec
> > with kern.timecounter.hardware=TSC, and 28,500 updates/sec with ACPI-safe.
> >
> > 1) Is it safe to switch to TSC?
> >
> > 2) If yes, would it be safe to switch to TSC if this was a real
> > SMP system with multiple physical cpus?
>
> Probably not. The problem is that the TSC is not necessarily in sync between
> the CPUs so time would "jump around" as you migrated between CPUs. If you
> can get the TSC's synchronized between the CPUs and keep them that way then
> you can use the TSC (Linux does this FWIW).
>
But on a single CPU HTT machine, does each HTT core reads the same TSC?
Drew
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