gnu/154907: [PATCH] gcc: backport opteron-sse3, athlon64-sse3, k8-sse3 march options

Sun Feb 20 10:40:09 UTC 2011

>Number:         154907
>Category:       gnu
>Synopsis:       [PATCH] gcc: backport opteron-sse3, athlon64-sse3, k8-sse3 march options
>Confidential:   no
>Severity:       non-critical
>Priority:       low
>Responsible:    freebsd-bugs
>State:          open
>Quarter:        
>Keywords:       
>Date-Required:
>Class:          change-request
>Submitter-Id:   current-users
>Arrival-Date:   Sun Feb 20 10:40:08 UTC 2011
>Closed-Date:
>Last-Modified:
>Originator:     Martin Matuska
>Release:        FreeBSD 9-CURRENT amd64
>Organization:
>Environment:
>Description:
Starting with AMD Athlon 64 (Venice Stepping E3 and San Diego Stepping E4)
and AMD Opteron (since Stepping E4) all AMD CPU's support the SSE3 instruction
set.

In gcc 4.3, SVN revision 124339 (still under GPLv2), new -march=/-mtune= 
optimization flags have been introduced: opteron-sse3, athlon64-sse3, k8-sse3

As these options are a small and non-intrusive GPLv2-licensed change,
I recommend backporting these options to contrib/gcc and adding the new flags
to share/mk/bsd.cpu.mk

These processors support in i386 mode the "prescott" optimization and in
amd64 mode the "opteron-sse3, athlon64-sse3 and k8-sse3 optimizations.

I have a system with recent Opteron 6100 Series procesors and make buildworld
fails because of wrong compilation assumptions if using CPUTYPE=nocona.

References:
http://gcc.gnu.org/viewcvs?view=revision&revision=124339
>How-To-Repeat:
>Fix:

Index: contrib/gcc/doc/gcc.1
===================================================================

--- contrib/gcc/doc/gcc.1	(revision 218880)
+++ contrib/gcc/doc/gcc.1	(working copy)
@@ -8751,6 +8751,9 @@
 .IX Item "k8, opteron, athlon64, athlon-fx"
 \&\s-1AMD\s0 K8 core based CPUs with x86\-64 instruction set support.  (This supersets
 \&\s-1MMX\s0, \s-1SSE\s0, \s-1SSE2\s0, 3dNOW!, enhanced 3dNOW! and 64\-bit instruction set extensions.)
+.IP "\fIk8-sse3, opteron-sse3, athlon64-sse3\fR" 4
+.IX Item "k8-sse3, opteron-sse3, athlon64-sse3"
+Improved versions of k8, opteron and athlon64 with \s-1SSE3\s0 instruction set support.
 .IP "\fIwinchip\-c6\fR" 4
 .IX Item "winchip-c6"
 \&\s-1IDT\s0 Winchip C6 \s-1CPU\s0, dealt in same way as i486 with additional \s-1MMX\s0 instruction
Index: contrib/gcc/doc/invoke.texi
===================================================================
--- contrib/gcc/doc/invoke.texi	(revision 218880)
+++ contrib/gcc/doc/invoke.texi	(working copy)
@@ -9382,6 +9382,8 @@
 @item k8, opteron, athlon64, athlon-fx
 AMD K8 core based CPUs with x86-64 instruction set support.  (This supersets
 MMX, SSE, SSE2, 3dNOW!, enhanced 3dNOW! and 64-bit instruction set extensions.)
+ at item k8-sse3, opteron-sse3, athlon64-sse3
+Improved versions of k8, opteron and athlon64 with SSE3 instruction set support.
 @item winchip-c6
 IDT Winchip C6 CPU, dealt in same way as i486 with additional MMX instruction
 set support.
Index: contrib/gcc/config/i386/i386.c
===================================================================
--- contrib/gcc/config/i386/i386.c	(revision 218880)
+++ contrib/gcc/config/i386/i386.c	(working copy)
@@ -1523,10 +1523,19 @@
 			       | PTA_SSE | PTA_SSE2 },
       {"k8", PROCESSOR_K8, PTA_MMX | PTA_PREFETCH_SSE | PTA_3DNOW | PTA_64BIT
 				      | PTA_3DNOW_A | PTA_SSE | PTA_SSE2},
+      {"k8-sse3", PROCESSOR_K8, PTA_MMX | PTA_PREFETCH_SSE | PTA_3DNOW | PTA_64BIT
+				      | PTA_3DNOW_A | PTA_SSE | PTA_SSE2
+				      | PTA_SSE3 },
       {"opteron", PROCESSOR_K8, PTA_MMX | PTA_PREFETCH_SSE | PTA_3DNOW | PTA_64BIT
 				      | PTA_3DNOW_A | PTA_SSE | PTA_SSE2},
+      {"opteron-sse3", PROCESSOR_K8, PTA_MMX | PTA_PREFETCH_SSE | PTA_3DNOW | PTA_64BIT
+				      | PTA_3DNOW_A | PTA_SSE | PTA_SSE2
+				      | PTA_SSE3 },
       {"athlon64", PROCESSOR_K8, PTA_MMX | PTA_PREFETCH_SSE | PTA_3DNOW | PTA_64BIT
 				      | PTA_3DNOW_A | PTA_SSE | PTA_SSE2},
+      {"athlon64-sse3", PROCESSOR_K8, PTA_MMX | PTA_PREFETCH_SSE | PTA_3DNOW | PTA_64BIT
+				      | PTA_3DNOW_A | PTA_SSE | PTA_SSE2
+				      | PTA_SSE3 },
       {"athlon-fx", PROCESSOR_K8, PTA_MMX | PTA_PREFETCH_SSE | PTA_3DNOW | PTA_64BIT
 				      | PTA_3DNOW_A | PTA_SSE | PTA_SSE2},
       {"generic32", PROCESSOR_GENERIC32, 0 /* flags are only used for -march switch.  */ },
Index: share/examples/etc/make.conf
===================================================================
--- share/examples/etc/make.conf	(revision 218880)
+++ share/examples/etc/make.conf	(working copy)
@@ -30,8 +30,9 @@
 # NO_CPU_CFLAGS variable below.
 # Currently the following CPU types are recognized:
 #   Intel x86 architecture:
-#       (AMD CPUs)	opteron athlon64 athlon-mp athlon-xp athlon-4
-#			athlon-tbird athlon k8 k6-3 k6-2 k6 k5
+#       (AMD CPUs)	opteron-sse3 opteron athlon64-sse3 athlon64 athlon-mp
+#			athlon-xp athlon-4 athlon-tbird athlon k8-sse3 k8
+#			k6-3 k6-2 k6 k5
 #       (Intel CPUs)	core2 core nocona pentium4m pentium4 prescott
 #			pentium3m pentium3 pentium-m pentium2
 #			pentiumpro pentium-mmx pentium i486 i386
Index: share/mk/bsd.cpu.mk
===================================================================
--- share/mk/bsd.cpu.mk	(revision 218880)
+++ share/mk/bsd.cpu.mk	(working copy)
@@ -49,6 +49,9 @@
 CPUTYPE = pentium-mmx
 .  elif ${CPUTYPE} == "i586"
 CPUTYPE = pentium
+.  elif ${CPUTYPE} == "opteron-sse3" || ${CPUTYPE} == "athlon64-sse3" || \
+     ${CPUTYPE} == "k8-sse3"
+CPUTYPE = prescott
 .  elif ${CPUTYPE} == "opteron" || ${CPUTYPE} == "athlon64" || \
      ${CPUTYPE} == "k8"
 CPUTYPE = athlon-mp
@@ -158,7 +161,9 @@
 # presence of a CPU feature.
 
 . if ${MACHINE_CPUARCH} == "i386"
-.  if ${CPUTYPE} == "opteron" || ${CPUTYPE} == "athlon64"
+.  if ${CPUTYPE} == "opteron-sse3" || ${CPUTYPE} == "athlon64-sse3"
+MACHINE_CPU = athlon-xp athlon k7 3dnow sse3 sse2 sse mmx k6 k5 i586 i486 i386
+.  elif ${CPUTYPE} == "opteron" || ${CPUTYPE} == "athlon64"
 MACHINE_CPU = athlon-xp athlon k7 3dnow sse2 sse mmx k6 k5 i586 i486 i386
 .  elif ${CPUTYPE} == "athlon-mp" || ${CPUTYPE} == "athlon-xp" || \
     ${CPUTYPE} == "athlon-4"
@@ -197,7 +202,9 @@
 MACHINE_CPU = i386
 .  endif
 . elif ${MACHINE_CPUARCH} == "amd64"
-.  if ${CPUTYPE} == "opteron" || ${CPUTYPE} == "athlon64" || ${CPUTYPE} == "k8"
+.  if ${CPUTYPE} == "opteron-sse3" || ${CPUTYPE} == "athlon64-sse3" || ${CPUTYPE} == "k8-sse3"
+MACHINE_CPU = k8 3dnow sse3
+.  elif ${CPUTYPE} == "opteron" || ${CPUTYPE} == "athlon64" || ${CPUTYPE} == "k8"
 MACHINE_CPU = k8 3dnow
 .  elif ${CPUTYPE} == "nocona"
 MACHINE_CPU = sse3
>Release-Note:
>Audit-Trail:
>Unformatted:
