Index: sys/arm/arm/cpufunc_asm_arm10.S
===================================================================
--- sys/arm/arm/cpufunc_asm_arm10.S	(revision 267429)
+++ sys/arm/arm/cpufunc_asm_arm10.S	(working copy)
@@ -209,7 +209,7 @@
 	mcr	p15, 0, r0, c7, c5, 0	/* Flush I cache */
 	/* Fall through to purge Dcache. */
 
-ENTRY(arm10_dcache_wbinv_all)
+EENTRY(arm10_dcache_wbinv_all)
 .Larm10_dcache_wbinv_all:
 	ldr	ip, .Larm10_cache_data
 	ldmia	ip, {s_max, i_max, s_inc, i_inc}
@@ -224,7 +224,7 @@
 	mcr	p15, 0, r0, c7, c10, 4	/* drain the write buffer */
 	bx	lr
 END(arm10_idcache_wbinv_all)
-END(arm10_dcache_wbinv_all)
+/*END(arm10_dcache_wbinv_all)*/
 
 .Larm10_cache_data:
 	.word	_C_LABEL(arm10_dcache_sets_max)
Index: sys/arm/arm/cpufunc_asm_arm9.S
===================================================================
--- sys/arm/arm/cpufunc_asm_arm9.S	(revision 267429)
+++ sys/arm/arm/cpufunc_asm_arm9.S	(working copy)
@@ -197,7 +197,7 @@
 	mcr	p15, 0, r0, c7, c5, 0	/* Flush I cache */
 	/* Fall through */
 
-ENTRY(arm9_dcache_wbinv_all)
+EENTRY(arm9_dcache_wbinv_all)
 .Larm9_dcache_wbinv_all:
 	ldr	ip, .Larm9_cache_data
 	ldmia	ip, {s_max, i_max, s_inc, i_inc}
@@ -210,7 +210,7 @@
 	subs	s_max, s_max, s_inc
 	bhs	.Lnext_set_inv		/* Next set */
 	mov	pc, lr
-END(arm9_idcache_wbinv_all)
+/*END(arm9_idcache_wbinv_all)*/
 END(arm9_dcache_wbinv_all)
 
 .Larm9_cache_data:
Index: sys/arm/arm/cpufunc_asm_armv5.S
===================================================================
--- sys/arm/arm/cpufunc_asm_armv5.S	(revision 267429)
+++ sys/arm/arm/cpufunc_asm_armv5.S	(working copy)
@@ -194,6 +194,7 @@
 END(armv5_idcache_wbinv_range)
 
 ENTRY_NP(armv5_idcache_wbinv_all)
+armv5_idcache_wbinv_all:
 .Larmv5_idcache_wbinv_all:
 	/*
 	 * We assume that the code here can never be out of sync with the
@@ -203,7 +204,7 @@
 	mcr	p15, 0, r0, c7, c5, 0	/* Flush I cache */
 	/* Fall through to purge Dcache. */
 
-ENTRY(armv5_dcache_wbinv_all)
+EENTRY(armv5_dcache_wbinv_all)
 .Larmv5_dcache_wbinv_all:
 	ldr	ip, .Larmv5_cache_data
 	ldmia	ip, {s_max, i_max, s_inc, i_inc}
@@ -220,7 +221,7 @@
 	mcr	p15, 0, r0, c7, c10, 4	/* drain the write buffer */
 	RET
 END(armv5_idcache_wbinv_all)
-END(armv5_dcache_wbinv_all)
+/*END(armv5_dcache_wbinv_all)*/
 
 .Larmv5_cache_data:
 	.word	_C_LABEL(armv5_dcache_sets_max)
Index: sys/arm/arm/cpufunc_asm_armv6.S
===================================================================
--- sys/arm/arm/cpufunc_asm_armv6.S	(revision 267429)
+++ sys/arm/arm/cpufunc_asm_armv6.S	(working copy)
@@ -137,12 +137,12 @@
 	/* Fall through to purge Dcache. */
 
 /* LINTSTUB: void armv6_dcache_wbinv_all(void); */
-ENTRY(armv6_dcache_wbinv_all)
+EENTRY(armv6_dcache_wbinv_all)
 	mcr	p15, 0, r0, c7, c14, 0	/* clean & invalidate D cache */
 	mcr	p15, 0, r0, c7, c10, 4	/* drain the write buffer */
 	RET
 END(armv6_idcache_wbinv_all)
-END(armv6_dcache_wbinv_all)
+/*END(armv6_dcache_wbinv_all)*/
 
 ENTRY(armv6_idcache_inv_all)
 	mov	r0, #0
Index: sys/arm/arm/cpufunc_asm_armv7.S
===================================================================
--- sys/arm/arm/cpufunc_asm_armv7.S	(revision 267429)
+++ sys/arm/arm/cpufunc_asm_armv7.S	(working copy)
@@ -358,7 +358,7 @@
 	mcr     p15, 0, r0, c7, c5, 0   @ invalidate instruction+branch cache
 	isb                             @ instruction sync barrier
 	bx      lr                      @ return
-END(armv7_l1cache_inv_all)
+END(armv7_idcache_inv_all)
 
 ENTRY_NP(armv7_sleep)
 	dsb
Index: sys/arm/arm/cpufunc_asm_xscale.S
===================================================================
--- sys/arm/arm/cpufunc_asm_xscale.S	(revision 267429)
+++ sys/arm/arm/cpufunc_asm_xscale.S	(working copy)
@@ -306,11 +306,12 @@
 	XSCALE_CACHE_CLEAN_UNBLOCK
 
 ENTRY_NP(xscale_cache_syncI)
-ENTRY_NP(xscale_cache_purgeID)
+
+EENTRY_NP(xscale_cache_purgeID)
 	mcr	p15, 0, r0, c7, c5, 0	/* flush I cache (D cleaned below) */
-ENTRY_NP(xscale_cache_cleanID)
-ENTRY_NP(xscale_cache_purgeD)
-ENTRY(xscale_cache_cleanD)
+EENTRY_NP(xscale_cache_cleanID)
+EENTRY_NP(xscale_cache_purgeD)
+EENTRY(xscale_cache_cleanD)
 	XSCALE_CACHE_CLEAN_PROLOGUE
 
 1:	subs	r0, r0, #32
@@ -327,10 +328,10 @@
 	XSCALE_CACHE_CLEAN_EPILOGUE
 	RET
 END(xscale_cache_syncI)
-END(xscale_cache_purgeID)
-END(xscale_cache_cleanID)
-END(xscale_cache_purgeD)
-END(xscale_cache_cleanD)
+/*END(xscale_cache_purgeID)*/
+/*END(xscale_cache_cleanID)*/
+/*END(xscale_cache_purgeD)*/
+/*END(xscale_cache_cleanD)*/
 
 /*
  * Clean the mini-data cache.
@@ -374,7 +375,7 @@
  */
 /* xscale_cache_syncI is identical to xscale_cache_purgeID */
 
-ENTRY(xscale_cache_cleanID_rng)
+EENTRY(xscale_cache_cleanID_rng)
 ENTRY(xscale_cache_cleanD_rng)
 	cmp	r1, #0x4000
 	bcs	_C_LABEL(xscale_cache_cleanID)
@@ -393,7 +394,7 @@
 	mcr	p15, 0, r0, c7, c10, 4	/* drain write buffer */
 
 	CPWAIT_AND_RETURN(r0)
-END(xscale_cache_cleanID_rng)
+/*END(xscale_cache_cleanID_rng)*/
 END(xscale_cache_cleanD_rng)
 
 ENTRY(xscale_cache_purgeID_rng)
Index: sys/arm/arm/cpufunc_asm_xscale_c3.S
===================================================================
--- sys/arm/arm/cpufunc_asm_xscale_c3.S	(revision 267429)
+++ sys/arm/arm/cpufunc_asm_xscale_c3.S	(working copy)
@@ -143,11 +143,12 @@
 
 
 ENTRY_NP(xscalec3_cache_syncI)
-ENTRY_NP(xscalec3_cache_purgeID)
+xscalec3_cache_purgeID:
+EENTRY_NP(xscalec3_cache_purgeID)
 	mcr	p15, 0, r0, c7, c5, 0	/* flush I cache (D cleaned below) */
-ENTRY_NP(xscalec3_cache_cleanID)
-ENTRY_NP(xscalec3_cache_purgeD)
-ENTRY(xscalec3_cache_cleanD)
+EENTRY_NP(xscalec3_cache_cleanID)
+EENTRY_NP(xscalec3_cache_purgeD)
+EENTRY(xscalec3_cache_cleanD)
 
 	XSCALE_CACHE_CLEAN_BLOCK
 	mov	r0, #0
@@ -169,10 +170,10 @@
 
 	RET
 END(xscalec3_cache_syncI)
-END(xscalec3_cache_purgeID)
-END(xscalec3_cache_cleanID)
-END(xscalec3_cache_purgeD)
-END(xscalec3_cache_cleanD)
+/*END(xscalec3_cache_purgeID)*/
+/*END(xscalec3_cache_cleanID)*/
+/*END(xscalec3_cache_purgeD)*/
+/*END(xscalec3_cache_cleanD)*/
 
 ENTRY(xscalec3_cache_purgeID_rng)
 
@@ -238,7 +239,7 @@
 END(xscalec3_cache_purgeD_rng)
 
 ENTRY(xscalec3_cache_cleanID_rng)
-ENTRY(xscalec3_cache_cleanD_rng)
+EENTRY(xscalec3_cache_cleanD_rng)
 
 	cmp	r1, #0x4000
 	bcs	_C_LABEL(xscalec3_cache_cleanID)
@@ -258,7 +259,7 @@
 
 	CPWAIT_AND_RETURN(r0)
 END(xscalec3_cache_cleanID_rng)
-END(xscalec3_cache_cleanD_rng)
+/*END(xscalec3_cache_cleanD_rng)*/
 
 ENTRY(xscalec3_l2cache_purge)
 	/* Clean-up the L2 cache */
Index: sys/arm/arm/exception.S
===================================================================
--- sys/arm/arm/exception.S	(revision 267429)
+++ sys/arm/arm/exception.S	(working copy)
@@ -280,13 +280,13 @@
 	 * that a newly created thread appears to return from a SWI just like
 	 * the parent thread that created it.
 	 */
-ASENTRY_NP(swi_exit)
+ASEENTRY_NP(swi_exit)
 	DO_AST				/* Handle pending signals. */
 	PULLFRAME			/* Deallocate trapframe. */
 	movs	pc, lr			/* Return to userland. */
 	STOP_UNWINDING			/* Don't unwind into user mode. */
 END(swi_exit)
-END(swi_entry)
+/*END(swi_entry)*/
 
 /*
  * Standard exception exit handler.
Index: sys/arm/arm/fusu.S
===================================================================
--- sys/arm/arm/fusu.S	(revision 267429)
+++ sys/arm/arm/fusu.S	(working copy)
@@ -54,7 +54,7 @@
  * Fetch an int from the user's address space.
  */
 
-ENTRY_NP(casuword32)
+EENTRY_NP(casuword32)
 ENTRY(casuword)
 	GET_PCB(r3)
 	ldr	r3, [r3]
@@ -91,7 +91,7 @@
 	mov	r1, #0x00000000
 	str	r1, [r3, #PCB_ONFAULT]
 	RET
-END(casuword32)
+/*END(casuword32)*/
 END(casuword)
 
 /*
@@ -110,7 +110,7 @@
  * Fetch an int from the user's address space.
  */
 
-ENTRY_NP(fuword32)
+EENTRY_NP(fuword32)
 ENTRY(fuword)
 	GET_PCB(r2)
 	ldr	r2, [r2]
@@ -129,7 +129,7 @@
 	str	r1, [r2, #PCB_ONFAULT]
 	mov	r0, r3
 	RET
-END(fuword32)
+/*END(fuword32)*/
 END(fuword)
 
 /*
@@ -277,7 +277,7 @@
  * Store an int in the user's address space.
  */
 
-ENTRY_NP(suword32)
+EENTRY_NP(suword32)
 ENTRY(suword)
 	GET_PCB(r2)
 	ldr	r2, [r2]
@@ -295,7 +295,7 @@
 	mov	r0, #0x00000000
 	str	r0, [r2, #PCB_ONFAULT]
 	RET
-END(suword32)
+/*END(suword32)*/
 END(suword)
 
 /*
@@ -390,4 +390,3 @@
 	str	r0, [r2, #PCB_ONFAULT]
 	RET
 END(subyte)
-
Index: sys/arm/arm/locore.S
===================================================================
--- sys/arm/arm/locore.S	(revision 267429)
+++ sys/arm/arm/locore.S	(working copy)
@@ -76,7 +76,7 @@
  * structure and pass that to initarm.
  */
 ENTRY_NP(btext)
-ASENTRY_NP(_start)
+ASEENTRY_NP(_start)
 	STOP_UNWINDING		/* Can't unwind into the bootloader! */
 
 	mov	r9, r0		/* 0 or boot mode from boot2 */
@@ -285,9 +285,8 @@
 	adr	r0, .Lmainreturned
 	b	_C_LABEL(panic)
 	/* NOTREACHED */
+/*END(_start)*/
 END(btext)
-END(_start)
-
 /*
  * Builds the page table
  * r0 - The table base address
@@ -555,10 +554,10 @@
 	.align	0
 	.global _C_LABEL(esigcode)
 		_C_LABEL(esigcode):
-
+END(sigcode)
 	.data
 	.global szsigcode
 szsigcode:
 	.long esigcode-sigcode
-END(sigcode)
+/*END(sigcode)*/
 /* End of locore.S */
Index: sys/arm/arm/setstack.s
===================================================================
--- sys/arm/arm/setstack.s	(revision 267429)
+++ sys/arm/arm/setstack.s	(working copy)
@@ -71,7 +71,7 @@
         msr	cpsr_fsxc, r3		/* Restore the old mode */
 
 	mov	pc, lr			/* Exit */
-
+END(set_stackptr)
 /* To get the stack pointer for a particular mode we must switch
  * to that mode copy the banked r13 and then switch back.
  * This routine provides an easy way of doing this for any mode
@@ -90,5 +90,5 @@
         msr	cpsr_fsxc, r3		/* Restore the old mode */
 
 	mov	pc, lr			/* Exit */
-
+END(get_stackptr)
 /* End of setstack.S */
Index: sys/arm/arm/support.S
===================================================================
--- sys/arm/arm/support.S	(revision 267429)
+++ sys/arm/arm/support.S	(working copy)
@@ -130,7 +130,7 @@
 .Lnormal0:
 	mov	r3, #0x00
 	b	do_memset
-
+END(bzero)
 /* LINTSTUB: Func: void *memset(void *, int, size_t) */
 ENTRY(memset)
 	and	r3, r1, #0xff		/* We deal with bytes */
@@ -276,7 +276,6 @@
 	strgeb	r3, [ip], #0x01		/* Set another byte */
 	strgtb	r3, [ip]		/* and a third */
 	RET			/* Exit */
-END(bzero)
 END(memset)
 
 ENTRY(bcmp)
@@ -394,7 +393,7 @@
 	eor     r0, r1, r0
 	eor     r1, r0, r1
 	eor     r0, r1, r0
-ENTRY(memmove)
+EENTRY(memmove)
 	/* Do the buffers overlap? */
 	cmp	r0, r1
 	RETeq		/* Bail now if src/dst are the same */
@@ -932,7 +931,7 @@
 	add	r1, r1, #1
 	b	.Lmemmove_bl4
 END(bcopy)
-END(memmove)
+/*END(memmove)*/
 
 #if !defined(_ARM_ARCH_5E)
 ENTRY(memcpy)
@@ -2945,13 +2944,17 @@
 
 ENTRY(user)
 	nop
+END(user)
 ENTRY(btrap)
 	nop
+END(btrap)
 ENTRY(etrap)
 	nop
+END(etrap)
 ENTRY(bintr)
 	nop
+END(bintr)
 ENTRY(eintr)
 	nop
-
+END(eintr)
 #endif
Index: sys/arm/include/asm.h
===================================================================
--- sys/arm/include/asm.h	(revision 267429)
+++ sys/arm/include/asm.h	(working copy)
@@ -74,6 +74,8 @@
 #define GLOBAL(X) .globl x
 #define _ENTRY(x) \
 	.text; _ALIGN_TEXT; .globl x; .type x,_ASM_TYPE_FUNCTION; x: _FNSTART
+#define _EENTRY(x) \
+	.globl x; .type x,_ASM_TYPE_FUNCTION; x:
 
 #define	_END(x)	.size x, . - x; _FNEND
 
@@ -85,10 +87,14 @@
 #endif
 
 #define	ENTRY(y)	_ENTRY(_C_LABEL(y)); _PROF_PROLOGUE
+#define	EENTRY(y)	_EENTRY(_C_LABEL(y)); _PROF_PROLOGUE
 #define	ENTRY_NP(y)	_ENTRY(_C_LABEL(y))
+#define	EENTRY_NP(y)	_EENTRY(_C_LABEL(y))
 #define	END(y)		_END(_C_LABEL(y))
 #define	ASENTRY(y)	_ENTRY(_ASM_LABEL(y)); _PROF_PROLOGUE
+#define	ASEENTRY(y)	_EENTRY(_ASM_LABEL(y)); _PROF_PROLOGUE
 #define	ASENTRY_NP(y)	_ENTRY(_ASM_LABEL(y))
+#define	ASEENTRY_NP(y)	_EENTRY(_ASM_LABEL(y))
 #define	ASEND(y)	_END(_ASM_LABEL(y))
 
 #define	ASMSTR		.asciz
Index: sys/libkern/arm/divsi3.S
===================================================================
--- sys/libkern/arm/divsi3.S	(revision 267429)
+++ sys/libkern/arm/divsi3.S	(working copy)
@@ -52,8 +52,8 @@
 END(__modsi3)
 
 #ifdef __ARM_EABI__
-ENTRY_NP(__aeabi_uidiv)
-ENTRY_NP(__aeabi_uidivmod)
+EENTRY_NP(__aeabi_uidiv)
+EENTRY_NP(__aeabi_uidivmod)
 #endif
 ENTRY_NP(__udivsi3)
 .L_udivide:				/* r0 = r0 / r1; r1 = r0 % r1 */
@@ -77,14 +77,14 @@
 	mov	r1, #0
 	RET
 #ifdef __ARM_EABI__
-END(__aeabi_uidiv)
-END(__aeabi_uidivmod)
+/*END(__aeabi_uidiv)*/
+/*END(__aeabi_uidivmod)*/
 #endif
 END(__udivsi3)
 
 #ifdef __ARM_EABI__
-ENTRY_NP(__aeabi_idiv)
-ENTRY_NP(__aeabi_idivmod)
+EENTRY_NP(__aeabi_idiv)
+EENTRY_NP(__aeabi_idivmod)
 #endif
 ENTRY_NP(__divsi3)
 .L_divide:				/* r0 = r0 / r1; r1 = r0 % r1 */
@@ -401,8 +401,8 @@
 	mov	r0, r3
 	RET
 #ifdef __ARM_EABI__
-END(__aeabi_idiv)
-END(__aeabi_idivmod)
+/*END(__aeabi_idiv)*/
+/*END(__aeabi_idivmod)*/
 #endif
 END(__divsi3)
 
