Debugging a hang during boot

Balanga Bar balanga.bar at gmail.com
Mon May 27 11:23:13 UTC 2019


Many thanks.

My DREAMPLUG-1001 conf file has the following - so I assume I'm ready to
go... although not sure when to enter Alt-Brk


# Debugging
#options        BREAK_TO_DEBUGGER
options         ALT_BREAK_TO_DEBUGGER
options         DDB
options         KDB
#options        DIAGNOSTIC
#options        INVARIANTS              #Enable calls of extra sanity
checking
#options        INVARIANT_SUPPORT       #Extra sanity checks of internal
structures, required by INVARIANTS
#options        WITNESS                 #Enable checks to detect deadlocks
and cycles
#options        WITNESS_SKIPSPIN        #Don't run witness on spinlocks for
speed
#options        WITNESS_KDB

On Mon, May 27, 2019 at 8:57 AM Michael Zhilin <mizhka at gmail.com> wrote:

> Hi,
>
> As UART works, you can use DDB for debugging:
>
> https://www.freebsd.org/doc/en/books/developers-handbook/kerneldebug-online-ddb.html
>
> To enter DDB there are a lot of ways: BREAK_TO_DEBUGGER or
> ALT_BREAK_TO_DEBUGGER can help you.
>
> Thanks!
>
> On Mon, May 27, 2019 at 12:30 AM Balanga Bar <balanga.bar at gmail.com>
> wrote:
>
>> Can anyone suggest how to go about debugging a hang during booting?
>>
>> I built a kernel for a GoFlex Home unit using DREAMPLUG-1001 without any
>> amendments.
>>
>> Here is my boot log:-
>>
>> ==========================================================================
>>
>> Booting [/boot/kernel/kernel]...
>>
>>
>> Using DTB compiled into kernel.
>>
>>
>> / - \ | Kernel entry at 0x1200180...
>>
>>
>> Kernel args: (null)
>>
>>
>> Copyright (c) 1992-2017 The FreeBSD Project.
>> Copyright (c) 1979, 1980, 1983, 1986, 1988, 1989, 1991, 1992, 1993, 1994
>>         The Regents of the University of California. All rights reserved.
>> FreeBSD is a registered trademark of The FreeBSD Foundation.
>> FreeBSD 11.1-RELEASE #0: Sun May 26 16:53:47 UTC 2019
>>     root at 11-1:/usr/obj/arm.arm/usr/src/sys/DREAMPLUG-1001 arm
>> FreeBSD clang version 4.0.0 (tags/RELEASE_400/final 297347) (based on
>> LLVM 4.0.0)
>> CPU: Feroceon 88FR131 rev 1 (**unknown 4** core)
>>   Little-endian DC enabled IC disabled WA disabled DC streaming enabled
>>   BTB disabled L2 enabled L2 prefetch enabled
>>   WB enabled LABT branch prediction disabled
>>   16KB/32B 4-way instruction cache
>>   16KB/32B 4-way write-back-locking-C data cache
>> real memory  = 134213632 (127 MB)
>> avail memory = 121282560 (115 MB)
>> SOC: Marvell 88F6281 rev A1, TClock 200MHz
>>   Instruction cache prefetch disabled, data cache prefetch disabled
>>   256KB 4-way set-associative write-through unified L2 cache
>> random: entropy device external interface
>> ofwbus0: <Open Firmware Device Tree>
>> simplebus0: <Flattened device tree simple bus> on ofwbus0
>> cpulist0: <Open Firmware CPU Group> on ofwbus0
>> cpu0: <Open Firmware CPU> on cpulist0
>> localbus0: <Marvell device bus> on ofwbus0
>> ic0: <Marvell Integrated Interrupt Controller> mem 0x20200-0x2023b on
>> simplebus0
>> timer0: <Marvell CPU Timer> mem 0x20300-0x2032f irq 1 on simplebus0
>> Event timer "CPUTimer0" frequency 200000000 Hz quality 1000
>> Timecounter "CPUTimer1" frequency 200000000 Hz quality 1000
>> gpio0: <Marvell Integrated GPIO Controller> mem 0x10100-0x1011f irq
>> 35,36,37,38,39,40,41 on simplebus0
>> rtc0: <Marvell Integrated RTC> mem 0x10300-0x10307 on simplebus0
>> twsi0: <Marvell Integrated I2C Bus Controller> mem 0x11000-0x1101f irq
>> 43 on simplebus0
>> iicbus0: <Philips I2C bus> on twsi0
>> iic0: <I2C generic I/O> on iicbus0
>> mge0: <Marvell Gigabit Ethernet controller> mem 0x72000-0x73fff irq
>> 12,13,14,11,46 on simplebus0
>> mge0: PHY0 attached, phy_sc points to mge0
>> mge0: Ethernet address: 00:10:75:28:cc:00
>> miibus0: <MII bus> on mge0
>> e1000phy0: <Marvell 88E1116R Gigabit PHY> PHY 0 on miibus0
>> e1000phy0:  none, 10baseT, 10baseT-FDX, 100baseTX, 100baseTX-FDX,
>> 1000baseT, 1000baseT-master, 1000baseT-FDX, 1000baseT-FDX-master, auto
>> mge1: <Marvell Gigabit Ethernet controller> mem 0x76000-0x77fff irq
>> 16,17,18,15,47 on simplebus0
>> mge1: PHY1 attached, phy_sc points to mge0
>> mge1: MII failed to find PHY
>> device_attach: mge1 attach returned 6
>> uart0: <16550 or compatible> mem 0x12000-0x1201f irq 33 on simplebus0
>> uart0: console (1056,n,8,1)
>> uart1: <16550 or compatible> mem 0x12100-0x1211f irq 34 on simplebus0
>> cesa0: <Marvell Cryptographic Engine and Security Accelerator> mem
>> 0x30000-0x30fff,0x3d000-0x3dfff irq 22 on simplebus0
>> ehci0: <Marvell Integrated USB 2.0 controller> mem 0x50000-0x50fff irq
>> 48,19 on simplebus0
>> usbus0: EHCI version 1.0
>> usbus0 on ehci0
>> mvs0: <Marvell 88F6281 SATA controller> mem 0x80000-0x85fff irq 21 on
>> simplebus0
>> mvs0: Gen-IIe, 2 3Gbps ports, Port Multiplier supported with FBS
>> mvsch0: <Marvell SATA channel> at channel 0 on mvs0
>> mvsch1: <Marvell SATA channel> at channel 1 on mvs0
>> cryptosoft0: <software crypto>
>> Timecounters tick every 10.000 msec
>>
>> usbus0: 480Mbps High Speed USB v2.0
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>


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