eMMC issues on Allwiner A20-OLinuXino-LIME2-eMMC

Jookia 166291 at gmail.com
Sat Nov 10 14:00:35 UTC 2018


As an update on this, it seems to be that the issue stops when DDR52
capability is disabled. Someone else had a similiar issue with the Pine64:
https://forum.pine64.org/archive/index.php?thread-6339.html

> * eMMC crashes on a protocol issue;
> Allwinner datasheet;
> * "SMHC Controller support up to MMC5.0"
>   -- 52 is activated in the features.

Apparently the A20 doesn't support HS200:
https://www.olimex.com/forum/index.php?topic=6653.0

> A20 do not support HS200
> 
> we have two versions one is with Micron eMMC  ver. 4.51 which makes about 12-13MB/s transfer
> we have now new boards with eMMC v5.0 where same A20 processor due to the improved timing in v5.x improve the transfer up to 18-20MB/s
> 
> A64 has eMMC v5.x support and multispeed mode and achieve up to 40MB/s transfers

This kernel thread alludes to the Pine64 issue:
https://groups.google.com/forum/?_escaped_fragment_=topic/linux.kernel/L9lXBGYgvXk

> mmc2 works fine for either 4 bit SDR/DDR or 8 bit SDR only. It does
> not work for 8 bit DDR. I actually tested all the above combinations.

Regardless I'm stumped since the FreeBSD driver code and Linux driver
code don't have any obvious differences with handling DDR52 in them that
I can see.


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