CC core dumping with CLANG 3.7 on armv5 - DREAMPLUG

[Mattia Rossi]

> You may disassemble the instruction at the address, and print the content
> of registers:
> (gdb) disassemble *0x01eb0868-8,0x01eb0868+8
> (gdb) info registers
>
> If the cause of your issue is weird codegeneration on ARMv5, it might be
> seen from the data above.  On the other hand, this would not help if the
> issue is algorithmic.  I am afraid there is not much more to suggest.
(gdb) disassemble *0x01eb0868-8,0x01eb0868+8
No function contains specified address.

(gdb) info registers
r0             0x1e53b  124219
r1             0x6a     106
r2             0xc3c3c3c6       -1010580538
r3             0x5a5a5a59       1515870809
r4             0x3      3
r5             0x1fd9f83        33398659
r6             0x1e53b  124219
r7             0x4019   16409
r8             0x22a1708c       581005452
r9             0xffffffff       -1
r10            0x5a5a5a5a       1515870810
r11            0xbfbfeb70       -1077941392
r12            0x1      1
sp             0xbfbfeb48       -1077941432
lr             0x8f5c   36700
pc             0x1eb0868        32180328
fps            0x0      0
cpsr           0x60000010       1610612752
(gdb)

Doesn't tell me anything :-(

>
> Is ARMv5 considered active platform for clang anyway ?

In http://www.llvm.org/svn/llvm-project/llvm/trunk/lib/Target/ARM/ARM.td
I found this:

def HasV5TOps   : SubtargetFeature<"v5t", "HasV5TOps", "true",
                                    "Support ARM v5T instructions",
                                    [HasV4TOps]>;


Which to me means that it still supports armv5 ...