panic: arm_unmask_irq [was: Re: TI platforms code update: switching to vendor FDT data]
Ian Lepore
ian at freebsd.org
Mon May 25 00:36:27 UTC 2015
On Sun, 2015-05-24 at 17:33 -0700, Marcel Moolenaar wrote:
> > On May 24, 2015, at 5:16 PM, Ian Lepore <ian at freebsd.org> wrote:
> >
> > Shouldn't the driver attach order be controlled with BUS_PASS numbers
> > now? That's been required with other socs that moved to the standard
> > dts data where we don't control the order of the nodes in the file.
>
> The problem is different in my case, but yes it was the first
> thing I suspected without digging deeper:
>
> fbsdvm64% svn diff sys/arm
> Index: sys/arm/ti/aintc.c
> ===================================================================
> --- sys/arm/ti/aintc.c (revision 283321)
> +++ sys/arm/ti/aintc.c (working copy)
> @@ -156,7 +156,8 @@
>
> static devclass_t ti_aintc_devclass;
>
> -DRIVER_MODULE(aintc, simplebus, ti_aintc_driver, ti_aintc_devclass, 0, 0);
> +EARLY_DRIVER_MODULE(aintc, simplebus, ti_aintc_driver, ti_aintc_devclass,
> + 0, 0, BUS_PASS_ORDER_EARLY);
>
> int
> arm_get_next_irq(int last_irq)
>
>
> --
> Marcel Moolenaar
> marcel at xcllnt.net
>
For an interrupt controller that should probably be
BUS_PASS_INTERRUPT + BUS_PASS_ORDER_MIDDLE
We have to do some fine-grained tuning in some cases and there are only
a few predefined categories and they're spaced really close together.
-- Ian
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