current meaning of BUS_DMA_COHERENT

[Warner Losh]

> On Mar 20, 2015, at 8:27 AM, Ian Lepore <ian at freebsd.org> wrote:
> What we really need is a new type of busdma memory (BUS_DMA_DESCRIPTOR)
> and a special sync call to use in conjunction with it that takes an
> offset and length, and the sync is a single operation, no pre/post
> stuff.  Then you could sync each descriptor immediately before reading
> and writing it, which would translate to a single cacheline flush
> instead of a loop that does all the lines in the whole ring.

We don’t need a special type of memory for this. NetBSD doesn’t have
that. Instead it implements a range on the sync operation. We could easily
just do that. We already have flags to disable bouncing, which is also
required for interacting with descriptor rings.

I’m curious where you need to do both a pre read and a post read before
you read the ring. Why is that needed?

Warner

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