GIC - interrupts interpretation in DTS/FDT

[Mihai Carabas]

On Fri, Aug 28, 2015 at 4:06 PM, Julien Grall <julien.grall at citrix.com>
wrote:

> Hi,
>
> On 28/08/15 09:40, Mihai Carabas wrote:
> > On Fri, Aug 28, 2015 at 11:35 AM, Zbigniew Bodek <zbodek at gmail.com>
> wrote:
> >
> >> Hello Mihai,
> >>
> >> This documents may be helpful:
> >>
> >>
> https://git.kernel.org/cgit/linux/kernel/git/torvalds/linux.git/tree/Documentation/devicetree/bindings/arm/gic.txt
> >>
> >> The meaning of each interrupt cell (for ARM GIC) is described there.
> >>
> >> Thank you for pointing me out that document.
> >
> > The problem I was asking was specific to the FreeBSD gic code:
> > """
> > 165 >------->------- * The hardware only supports active-high-level or
> > rising-edge.
> > 166 >------->------- */
> > 167 >------->-------if (fdt32_to_cpu(intr[2]) & 0x0a) {
> > 168 >------->------->-------printf("unsupported trigger/polarity
> > configuration "
> > 169 >------->------->-------    "0x%2x\n", fdt32_to_cpu(intr[2]) & 0x0f);
> > 170 >------->------->-------return (ENOTSUP);
> > 171 >------->-------}
> >  """
> >
> > It is verified the not supported bits in both cases (PPIs and SPIs) and I
> > didn't understand why. Probably a bug.
>
> It's a bug, based on the documentation pointed by Zbigniew this check
> should
> only be done for SPIs.
>
> I hit this problem when porting FreeBSD as Xen ARM guest because our Xen
> interrupt is a PPI active-low level-sentive. I got a patch which I carry in
> my branch but never took the time to upstream it:
>
> Did the same on my branch. But I wanted to point this out and be sure I'm
not mistaking anything. May be someone will fix it on master too.

Thank you all,
Mihai