GIC - interrupts interpretation in DTS/FDT

[Mihai Carabas]

Hi everyone,

In the sys/arm/arm/gic.c there is a comment: "The hardware only supports
active-high-level or rising-edge". From where is this deducted?

I'm looking in the TRM for Cortex-A15 and there are some interrupts
active-low-level. E.g.: "Virtual Timer event (PPI4) This is the event
generated from the virtual timer and uses ID27. The interrupt is active-LOW
level-sensitive."

Thanks,
Mihai