arm SMP on Cortex-A15

[Wojciech Macek]

Hi,

Finally, I'm able to run FreeBSD stable on Cortex-A15. The TLB issue which
was observed, was caused by an aggressive A15 feature called "L2 TLB
prefetch".

There are 4 fixes that helped:
0. Prerequisite, Olivier's patch for PCPU atomicity.
1. TEX remap - to be compliant with spec, TEX remap is used to configure
memory as Inner Shareable
2. TLB flush SE - after each PTE modification and PTE_SYNC, there is no
guarantee that newly created entry is not overlapped by old value in TLB
cache. Do flush_SE to ensure proper mapping.
3. During context switch, ensure that tlb flush is executed after ttb is
changed. Clean BTB to be compliant with specs.

Above patches can be found here
https://drive.google.com/folderview?id=0B-7yTLrPxaWteWFtWUQxVVNHVFk&usp=sharing


None of them is 100%-ready, but should work. Any comments and/or testing
are really appreciated.

Regards,
Wojtek