arm/160431: [busdma] [patch] Disable interrupts during busdma cache sync operations.

[Ian Lepore]

The following reply was made to PR arm/160431; it has been noted by GNATS.

From: Ian Lepore <freebsd at damnhippie.dyndns.org>
To: bug-followup at FreeBSD.org
Cc:  
Subject: Re: arm/160431: [busdma] [patch] Disable interrupts during busdma
 cache sync operations.
Date: Sat, 21 Apr 2012 10:01:06 -0600

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 Here is the latest and most-tested patch for this problem.  
 
 Mark Tinguely had suggested that the scope of having interrupts disabled
 be narrowed to just the time spent doing a partial cacheline flush, as
 opposed to disabling them for the entire bus_dmamap_sync_buf() function
 as my original patch did.  I made that change and we've been shipping
 products using this new patch since September 2011, but I apparently
 neglected to submit the updated patch (which also fixes some line
 wrapping and other style(9) issues).
 
 -- Ian
 
 
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 Index: sys/arm/arm/busdma_machdep.c
 ===================================================================
 --- sys/arm/arm/busdma_machdep.c	(revision 234543)
 +++ sys/arm/arm/busdma_machdep.c	(working copy)
 @@ -1106,28 +1106,45 @@
  	    		cpu_l2cache_wbinv_range((vm_offset_t)buf, len);
  		}
  	}
 +	/*
 +	 * Interrupts must be disabled while handling a partial cacheline flush,
 +	 * otherwise the interrupt handling code could modify data in the
 +	 * non-DMA part of a cacheline while we have it stashed away in the
 +	 * temporary stack buffer, then we end up restoring the stale value.
 +	 * As unlikely as this seems, it has been observed in the real world.
 +	 */
  	if (op & BUS_DMASYNC_POSTREAD) {
 -		if ((vm_offset_t)buf & arm_dcache_align_mask) {
 -			memcpy(_tmp_cl, (void *)((vm_offset_t)buf & ~
 -			    arm_dcache_align_mask),
 -			    (vm_offset_t)buf & arm_dcache_align_mask);
 +		partial = (((vm_offset_t)buf) | len) & arm_dcache_align_mask;
 +		if (partial) {
 +			intr = intr_disable();
 +			if ((vm_offset_t)buf & arm_dcache_align_mask) {
 +				memcpy(_tmp_cl, (void *)((vm_offset_t)buf &
 +				    ~arm_dcache_align_mask),
 +				    (vm_offset_t)buf & arm_dcache_align_mask);
 +			}
 +			if (((vm_offset_t)buf + len) & arm_dcache_align_mask) {
 +				memcpy(_tmp_clend, 
 +				    (void *)((vm_offset_t)buf + len),
 +				    arm_dcache_align - 
 +				    (((vm_offset_t)(buf) + len) &
 +				    arm_dcache_align_mask));
 +			}
  		}
 -		if (((vm_offset_t)buf + len) & arm_dcache_align_mask) {
 -			memcpy(_tmp_clend, (void *)((vm_offset_t)buf + len),
 -			    arm_dcache_align - (((vm_offset_t)(buf) + len) &
 -			   arm_dcache_align_mask));
 -		}
  		cpu_dcache_inv_range((vm_offset_t)buf, len);
  		cpu_l2cache_inv_range((vm_offset_t)buf, len);
 -
 -		if ((vm_offset_t)buf & arm_dcache_align_mask)
 -			memcpy((void *)((vm_offset_t)buf &
 -			    ~arm_dcache_align_mask), _tmp_cl, 
 -			    (vm_offset_t)buf & arm_dcache_align_mask);
 -		if (((vm_offset_t)buf + len) & arm_dcache_align_mask)
 -			memcpy((void *)((vm_offset_t)buf + len), _tmp_clend,
 -			    arm_dcache_align - (((vm_offset_t)(buf) + len) &
 -			   arm_dcache_align_mask));
 +		if (partial) {
 +			if ((vm_offset_t)buf & arm_dcache_align_mask)
 +				memcpy((void *)((vm_offset_t)buf &
 +				    ~arm_dcache_align_mask), _tmp_cl, 
 +				    (vm_offset_t)buf & arm_dcache_align_mask);
 +			if (((vm_offset_t)buf + len) & arm_dcache_align_mask)
 +				memcpy((void *)((vm_offset_t)buf + len), 
 +				    _tmp_clend,
 +				    arm_dcache_align - 
 +				    (((vm_offset_t)(buf) + len) &
 +				    arm_dcache_align_mask));
 +			intr_restore(intr);
 +		}
  	}
  }
  
 
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