arm/150581: Unknown error generates IRQ address decoding error [patch]

Johny Mattsson johny.mattsson+fbsd at gmail.com
Sat Sep 18 09:10:04 UTC 2010


The following reply was made to PR arm/150581; it has been noted by GNATS.

From: Johny Mattsson <johny.mattsson+fbsd at gmail.com>
To: Tyler Saylor <wthww at 680x0.com>
Cc: FreeBSD-gnats-submit at freebsd.org, freebsd-arm at freebsd.org, 
	Mark Tinguely <marktinguely at gmail.com>
Subject: Re: arm/150581: Unknown error generates IRQ address decoding error [patch]
Date: Sat, 18 Sep 2010 19:01:51 +1000

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 Hi Tyler (and list),
 
 It turned out this was the same issue I've been trying to hunt down the
 cause of for a couple of weeks. With a lot of help from Mark Tinguely I've
 finally nailed it.
 
 This problem is caused by a double-whammy of bugs.
 
 First of all, the USB bridge address decoding register definitions fail to
 account for the main offset from the base of the USB port range. This means
 that decode_win_usb_setup() in sys/arm/mv/common.c doesn't actually manage
 to set up the windows properly. Instead of poking the address decoding
 registers it writes to the ID and HWGENERAL registers, and possibly others
 depending on how much RAM is installed. As a result of not getting the
 windows set up properly, the USB controller ends up only being capable of
 decoding a limited range of addresses. The precise range might depend on how
 the boot loader initialized the controller, or it might use a default range.
 As I only have one type of hardware I can't readily verify which it is.
 
 With the incorrect windows established, under heavy USB I/O the controller
 typically ends up trying to decode an address which is outside its
 window(s), and raises an error interrupt for it. This in itself is not
 fatal.
 
 The actual hang is caused by a failure to sufficiently clear the error
 condition in the error interrupt handler (err_intr() in
 dev/usb/controllers/ehci_mv.c). For an address decode error, it is necessary
 to read out the error address from the bridge error address register.
 Failure to do so before returning from the interrupt handler causes the
 interrupt to be reissued.
 
 The attached patch addresses both issues. I have successfully tested it on
 my 88F6281 based Pogoplug, and I have verified the register addresses
 against the 88F5281 documentation.
 
 Unless someone can find fault with this patch, I'd love to see this
 committed.
 
 Regards,
 /Johny
 
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 Hi Tyler (and list),<br><br>It turned out this was the same issue I&#39;ve =
 been trying to hunt down the cause of for a couple of weeks. With a lot of =
 help from Mark Tinguely I&#39;ve finally nailed it.<br><br>This problem is =
 caused by a double-whammy of bugs.<br>
 <br>First of all, the USB bridge address decoding register definitions fail=
  to account for the main offset from the base of the USB port range. This m=
 eans that decode_win_usb_setup() in sys/arm/mv/common.c doesn&#39;t actuall=
 y manage to set up the windows properly. Instead of poking the address deco=
 ding registers it writes to the ID and HWGENERAL registers, and possibly ot=
 hers depending on how much RAM is installed. As a result of not getting the=
  windows set up properly, the USB controller ends up only being capable of =
 decoding a limited range of addresses. The precise range might depend on ho=
 w the boot loader initialized the controller, or it might use a default ran=
 ge. As I only have one type of hardware I can&#39;t readily verify which it=
  is.<br>
 <br>With the incorrect windows established, under heavy USB I/O the control=
 ler typically ends up trying to decode an address which is outside its wind=
 ow(s), and raises an error interrupt for it. This in itself is not fatal.<b=
 r>
 <br>The actual hang is caused by a failure to sufficiently clear the error =
 condition in the error interrupt handler (err_intr() in dev/usb/controllers=
 /ehci_mv.c). For an address decode error, it is necessary to read out the e=
 rror address from the bridge error address register. Failure to do so befor=
 e returning from the interrupt handler causes the interrupt to be reissued.=
 <br>
 <br>The attached patch addresses both issues. I have successfully tested it=
  on my 88F6281 based Pogoplug, and I have verified the register addresses a=
 gainst the 88F5281 documentation.<br><br>Unless someone can find fault with=
  this patch, I&#39;d love to see this committed.<br>
 <br>Regards,<br>/Johny<br>
 
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