files damaged on memory disk on Marvell Discovery 78100

[Mark Tinguely]

Rafal Jaworowski wrote:
> On 2010-05-19, at 08:19, Matthias Reyelt wrote:
>
>   
>> I have observed a strange behaviour on the Marvell Discovery:
>>
>> I have a memory disk for /etc and /opt:
>> /dev/md0 on /etc (ufs, local)
>> /dev/md1 on /opt (ufs, local)
>>
>> When I copy files to that disk, which are larger than 0x1ffff (131071 bytes), 
>> these files differ from the original. This occurs only when copying to md. 
>>
>> Kernel is:
>> FreeBSD discovery1 8.0-STABLE FreeBSD 8.0-STABLE #0 r206836: Mon Apr 19 
>> 12:53:42 CEST 2010    
>> root at vbcspc12.bcs.brunel.local:/usr/obj/arm/root/ARM/8/sys/DB-78XXX  arm
>>
>> I had a look into the damaged file and found some excerpts from files located 
>> in /etc (which is also in RAM):
>> ------------------------------------------------------------
>> passwd: compat
>> passwd_compat: nis
>> shells: files
>> -----------------------------------------------------------------
>> ...
>> -----------------------------------------------------------------
>> staff:*:20:
>> sshd:*:22:
>> smmsp:*:25:
>> mailnull:*:26:
>> guest:*:3-���
>> ------------------------------------------------------------------
>>
>> Looks as if the CPU has problems accessing the RAM. I have already changed the 
>> RAM, so I don't think it's a hardware problem. 
>>
>> Any idea?
>>     
>
>
> Try turning off clustering on the filesystem(s). There was least one known problem in this area leading to cache incoherency, see this thread for more details (and how-to): http://lists.freebsd.org/pipermail/freebsd-arm/2008-December/001423.html
>
> Rafal
>   
Hmmm.

The Discovery  must have PIPT  caches? (The 
S_MV76100_78100_78200_OpenSource.pdf  doc mentions
32KB/4 way I/D cache; 128-256KB/8 way L2 caches, so I assume from that 
configuration, they must be PIPT).
I don't have access to the MV internal cache documents.

Is the L2 enabled?

Probably off topic: Does this have an active PCI express? I just noticed 
the note for the SlvWrSpltCnt bit in the PCI
Express Window1-4 Control Registers.

--Mark Tinguely.