RM9200 tuning

Bernd Walter ticso at cicely7.cicely.de
Mon Mar 8 21:24:14 UTC 2010


On Mon, Mar 08, 2010 at 01:49:57PM -0700, M. Warner Losh wrote:
> In message: <20100308202337.GF11192 at cicely7.cicely.de>
>             Bernd Walter <ticso at cicely7.cicely.de> writes:
> : Originally FreeBSD had assumed fixed clock rates.
> 
> Only for the first few revs.  Now it is settable with the
> AT91_MASTER_CLOCK option.

This is what I called the peripheral clock?
So in the normal case I setup this value to 60,000,000?

> : Knowing the peripheral rate is important for e.g. UART bps dividers.
> : I think in the meantime it is possible to reconfigure the kernel to
> : different clock rates - if yes what are the kernel options for it?
> : Which would be the best place to reconfigure the PLL?
> : I know how to do it and that it is done by the loader right now, but
> : I would like to have it as a kernel tuneable.
> : All I need to know is a good place in the kernel startup.
> 
> Hmmm, I thought the kernel tried to read the master clock rate, but I
> can't find the code that does it anymore.  The AT91 family have a
> register than can be read to get this value, so long as your board
> design conforms to the atmel documented restrictions on the clock xtal
> used.

Ah - I hardly remember that there was something like this.
I think it is initialized from the ROM code by comparing with the
32768 oscillator - without this it wouldn't be possible for the ROM code
to xmodem the first boot code via DBGU.
But I think it is just to get the xtal clock.
At least it would be possible to calculate the remaining clocks from
that.
Well - I want something different.
I want to reprogramm the PLL inside the kernel so I would be more
interested to know where there would be a good place to inject code for
this.
It needs to be early enough before anything depending on the clock has
startet.
I don't care if trampoline code unzip the kernel at highest speed.

> Or, as is usually the case with clocks on these parts, am I confusing
> this with something else :)

It sounds familar, but I do know that I had to hardcode the xtal speed
in the bootcode - which isn't the worst thing, since the xtal is always
16MHz with my boards.
Maybe is is used to setup the USB PLL later in the kernel.

-- 
B.Walter <bernd at bwct.de> http://www.bwct.de
Modbus/TCP Ethernet I/O Baugruppen, ARM basierte FreeBSD Rechner uvm.


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