ticso at cicely7.cicely.de
Mon Mar 8 20:23:43 UTC 2010
The whole cache story is scary enough I think, but it showed that it
is not avoidable to have uncacheable pages in some cases.
There are a few facts about RM9200 systems, which most of you running
those systems already know.
Most systems have 16Mx32 SDRAM - although other configurations with
x16 and different size are possible.
Although there is an external SRAM bus I don't think there is any good
sense to use it as general purpose RAM, since the ranges are small,
16bit and require lots of waitstates, which makes the slower than SDRAM
in almost every case.
There is also 16k fast internal SRAM, which isn't used within FreeBSD
Is there anything reasonable we can place in this RAM?
Originally I thought once about ate RX buffers or kernel page tables.
Atnother point are the clock speeds.
There are 3 important clocks - USB clock is generated by a separate
PLL and required to have a specific rate.
CPU clock is generated by another PLL and is typically 180MHz,
but allowed to be up to 205MHz IIRC.
Peripheral clock is divided from CPU clock and is typically 60MHz,
because 180MHz/3, but is allowed to be up to 80MHz.
The limiting factor is the PLL, which can't produce more than 180MHz.
But there are allowed settings, which might be faster in real world.
One example is running the CPU with 160MHz, which allows the
peripheral clock to be 80MHz.
The CPU ist slower, but memory is much faster.
The first not allowed thing is overclocking the PLL.
I've seen the PLL to happily produce 288MHz and I think the restriction
is just for the full temperature range and full xtal type range.
In fact I've even seen the CPU to run with 288MHz, but that's another
It should be OK to run the system with full ~205MHz in most cases,
which also increases the peripheral clock including the SDRAM speed.
SDRAM is typically rated with 133MHz or 100MHz, so no problem from
Then of course there is the possibility for overclocking the CPU
as well as in the 288MHz case.
Originally FreeBSD had assumed fixed clock rates.
Knowing the peripheral rate is important for e.g. UART bps dividers.
I think in the meantime it is possible to reconfigure the kernel to
different clock rates - if yes what are the kernel options for it?
Which would be the best place to reconfigure the PLL?
I know how to do it and that it is done by the loader right now, but
I would like to have it as a kernel tuneable.
All I need to know is a good place in the kernel startup.
B.Walter <bernd at bwct.de> http://www.bwct.de
Modbus/TCP Ethernet I/O Baugruppen, ARM basierte FreeBSD Rechner uvm.
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