Performance of SheevaPlug on 8-stable
ticso at cicely7.cicely.de
Sun Mar 7 20:12:30 UTC 2010
On Sun, Mar 07, 2010 at 08:56:14PM +0100, Maks Verver wrote:
> On 03/07/2010 08:00 AM, Bernd Walter wrote:
> > That's probably just because of different CPUs.
> > I see a similar output on all of my systems with ARM920T CPU and
> > still there is something wrong.
> That's strange indeed. I'm not sure if our problems are at all related
> (as in: caused by the same problem) as you seem to be using fairly
> different hardware.
That's true, but the symptoms I see are quite similar, although the
OS version seem to have an influence on how high the performance loss
This fact is especially puzzling, because I would have either expected
similar results or calulated performance.
> In my case the kernel (at boot up) doesn't seem to even think caches are
> enabled, which gives me some hope that if they were, then they would
> work. In your case the kernel claims to enable them but then they don't
> work. Seems different to me.
It is just different code printing the details for your CPU.
Take a look into sys/arm/arm/identcpu.c.
There is "if xxx IC disabled else IC enabled" printing - if you see
neither it is not printing from this code at all.
> > Your loop isn't doing any data access, so it's just saying something
> > about ICACHE not working.
> True enough.
> > But maybe it is not ICACHE itself and the memory pages are just
> > declared uncacheable?
> Another possibility. If anyone has suggestions on how to investigate
> this, I'd love to hear it.
B.Walter <bernd at bwct.de> http://www.bwct.de
Modbus/TCP Ethernet I/O Baugruppen, ARM basierte FreeBSD Rechner uvm.
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