OpenRD-Client/Ultimate support
Norikatsu Shigemura
nork at FreeBSD.org
Sun Jun 20 13:03:10 UTC 2010
Hi raj, imp and mav.
I made some patches for OpenRD Client and Ultimate. By my patches,
I confirmed that I can use OpenRD Ultimate (Sorry, I don't have
OpenRD Client). If you OKed, I'll commit attached patches.
My modifications:
mge(4):
1. Change how to get PHY numbers if not defined `phy-handle'
on a dts file. OpenRD already set it on FreeBSD booting.
Suggested by: hrs@
2. Change how to set PHY numbers.
Suggested by: Kristof Provost
3. Remove waiting link-up codes.
Reported by: nyan@
4. Don't count-up watchdog timer if link downed.
Pointed out by: yongari@
mvs(4):
5. FDT-ish
Kernel Configuration:
6. Generated by DB-88F6XXX, and added some my flavour, mvs(4).
Device Tree Source:
7. Generated by db88f6281.dts.
8. Add second NIC.
9. Setup MPP for OpenRD Client/Ultimate.
Obtained from: u-boot-1.1.4_2010.5.5.tar.bz2 on http://code.google.com/p/openrd/downloads/list
10. Change PCI address range.
TODO:
a. OpenRD base support (some different MPP)
b. uart(4) is storange, maybe s/1066/115200/:
uart0: console (1066,n,8,1)
c. PCI mem address range 0xf4000000 to 0xe8000000 (max 128MB)
In this time, I can get following results, so I set following
parameter to openrd-cl.dts.
If PCIe device require 128MB, maybe, can't allocate.
- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
map[10]: type Prefetchable Memory, range 32, base 0xf4000000, size 26, enabled
map[14]: type Memory, range 32, base 0xf8000000, size 18, enabled
map[18]: type I/O Port, range 32, base 0xf1100000, size 7, enabled
- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
But I can't understand how to describe pci0: related
parameters. So I don't have any idea to change address
window.
d. Fix MII PHY initialization issue:
88E1116R, 88E1121 (88E1249)
Result of /var/run/dmesg.boot
- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
KDB: debugger backends: ddb
KDB: current backend: ddb
Copyright (c) 1992-2010 The FreeBSD Project.
Copyright (c) 1979, 1980, 1983, 1986, 1988, 1989, 1991, 1992, 1993, 1994
The Regents of the University of California. All rights reserved.
FreeBSD is a registered trademark of The FreeBSD Foundation.
FreeBSD 9.0-CURRENT #61: Thu Jan 1 09:00:00 JST 1970
nork at dummy:/usr/obj/arm/usr/src/sys/OPENRD-CL arm
Preloaded elf kernel "elf kernel" at 0xc0c07e84.
CPU: Feroceon 88FR131 rev 1 (Marvell core)
DC enabled IC enabled WB enabled EABT branch prediction enabled
16KB/32B 4-way Instruction cache
16KB/32B 4-way write-back-locking-C Data cache
real memory = 536870912 (512 MB)
Physical memory chunk(s):
00000000 - 0x8fffff, 9437184 bytes (2304 pages)
0xcfb000 - 0x1f64bfff, 513085440 bytes (125265 pages)
avail memory = 520273920 (496 MB)
SOC: (0x6281:0x03) Marvell 88F6281 rev A1, TClock 200MHz
random: <entropy source, Software, Yarrow>
null: <null device, zero device>
mem: <memory>
openfirm: <Open Firmware control device>
nfslock: pseudo-device
fdtbus0: <FDT main bus> on motherboard
simplebus0: <Flattened device tree simple bus> on fdtbus0
ic0: <Marvell Integrated Interrupt Controller> mem 0xf1020200-0xf102023b on simplebus0
timer0: <Marvell CPU Timer> mem 0xf1020300-0xf102032f irq 1 on simplebus0
timer0: [FILTER]
gpio0: <Marvell Integrated GPIO Controller> mem 0xf1010100-0xf101011f irq 35,36,37,38,39,40,41 on simplebus0
gpio0: [FILTER]
gpio0: [FILTER]
gpio0: [FILTER]
gpio0: [FILTER]
gpio0: [FILTER]
gpio0: [FILTER]
gpio0: [FILTER]
rtc0: <Marvell Integrated RTC> mem 0xf1010300-0xf1010307 on simplebus0
rtc0: registered as a time-of-day clock (resolution 1000000us)
twsi0: <Marvell Integrated I2C Bus Controller> mem 0xf1011000-0xf101101f irq 43 on simplebus0
iicbus0: <Philips I2C bus> on twsi0
iic0: <I2C generic I/O> on iicbus0
mge0: <Marvell Gigabit Ethernet controller> mem 0xf1072000-0xf1073fff irq 12,13,14,11,46 on simplebus0
mge0: bpf attached
mge0: Ethernet address: 00:50:43:01:55:18
miibus0: <MII bus> on mge0
e1000phy0: <Marvell 88E1149 Gigabit PHY> PHY 0 on miibus0
e1000phy0: 10baseT, 10baseT-FDX, 100baseTX, 100baseTX-FDX, 1000baseT, 1000baseT-FDX, auto
mge0: [MPSAFE]
mge0: [ITHREAD]
mge0: [MPSAFE]
mge0: [ITHREAD]
mge1: <Marvell Gigabit Ethernet controller> mem 0xf1076000-0xf1077fff irq 16,17,18,15,47 on simplebus0
mge1: bpf attached
mge1: Ethernet address: 00:50:43:01:55:19
miibus1: <MII bus> on mge1
e1000phy1: <Marvell 88E1149 Gigabit PHY> PHY 1 on miibus1
e1000phy1: 10baseT, 10baseT-FDX, 100baseTX, 100baseTX-FDX, 1000baseT, 1000baseT-FDX, auto
mge1: [MPSAFE]
mge1: [ITHREAD]
mge1: [MPSAFE]
mge1: [ITHREAD]
uart0: <16550 or compatible> mem 0xf1012000-0xf101201f irq 33 on simplebus0
uart0: [FILTER]
uart0: fast interrupt
uart0: console (1066,n,8,1)
uart1: <16550 or compatible> mem 0xf1012100-0xf101211f irq 34 on simplebus0
uart1: [FILTER]
uart1: fast interrupt
ehci0: <Marvell Integrated USB 2.0 controller> mem 0xf1050000-0xf1050fff irq 48,19 on simplebus0
ehci0: [FILTER]
ehci0: [MPSAFE]
ehci0: [ITHREAD]
ehci0: 5.24 GL USB-2 workaround enabled
usbus0: EHCI version 1.0
usbus0: set host controller mode
usbus0: <Marvell Integrated USB 2.0 controller> on ehci0
sata0: <Marvell 88F6281 SATA controller> mem 0xf1080000-0xf1085fff irq 21 on simplebus0
sata0: Gen-IIe, 2 3Gbps ports, Port Multiplier supported with FBS
sata0: [MPSAFE]
sata0: [ITHREAD]
mvsch0: <Marvell SATA channel> at channel 0 on sata0
mvsch0: [MPSAFE]
mvsch0: [ITHREAD]
mvsch1: <Marvell SATA channel> at channel 1 on sata0
mvsch1: [MPSAFE]
mvsch1: [ITHREAD]
pcib0: <Marvell Integrated PCI/PCI-E Controller> mem 0xf1040000-0xf1041fff irq 44 on fdtbus0
PCI 0:1:0: reg 10: size=04000000: addr=f4000000
PCI 0:1:0: reg 14: size=00040000: addr=f8000000
PCI 0:1:0: reg 18: size=00000080: addr=f1100000
pci0: <PCI bus> on pcib0
pci0: domain=0, physical bus=0
found-> vendor=0x18ca, dev=0x0027, revid=0x00
domain=0, bus=0, slot=1, func=0
class=03-00-00, hdrtype=0x00, mfdev=0
cmdreg=0x0007, statreg=0x0010, cachelnsz=8 (dwords)
lattimer=0x00 (0 ns), mingnt=0x00 (0 ns), maxlat=0x00 (0 ns)
powerspec 2 supports D0 D1 D2 D3 current D0
MSI supports 1 message
map[10]: type Prefetchable Memory, range 32, base 0xf4000000, size 26, enabled
map[14]: type Memory, range 32, base 0xf8000000, size 18, enabled
map[18]: type I/O Port, range 32, base 0xf1100000, size 7, enabled
vgapci0: <VGA-compatible display> port 0xf1100000-0xf110007f mem 0xf4000000-0xf7ffffff,0xf8000000-0xf803ffff at device 1.0 on pci0
Timecounter "CPU Timer" frequency 200000000 Hz quality 1000
Timecounters tick every 1.000 msec
vlan: initialized, using hash tables with chaining
lo0: bpf attached
usbus0: 480Mbps High Speed USB v2.0
mvsch0: MVS reset...
mvsch0: SATA connect timeout status=00000000
mvsch0: MVS reset done: phy reset found no device
mvsch1: MVS reset...
mvsch1: SATA connect timeout status=00000000
mvsch1: MVS reset done: phy reset found no device
ugen0.1: <Marvell> at usbus0
uhub0: <Marvell EHCI root HUB, class 9/0, rev 2.00/1.00, addr 1> on usbus0
bootpc_init: wired to interface 'mge0'
Sending DHCP Discover packet from interface mge0 (00:50:43:01:55:18)
uhub0: 1 port with 1 removable, self powered
ugen0.2: <vendor 0x05e3> at usbus0
uhub1: <vendor 0x05e3 USB2.0 Hub, class 9/0, rev 2.00/77.32, addr 2> on usbus0
uhub1: 4 ports with 4 removable, self powered
ugen0.3: <vendor 0x05e3> at usbus0
uhub2: <vendor 0x05e3 USB2.0 Hub, class 9/0, rev 2.00/77.32, addr 3> on usbus0
Received DHCP Offer packet on mge0 from 192.168.36.249 (accepted) (no root path)
Received DHCP Offer packet on mge0 from 192.168.36.249 (ignored) (no root path)
Received DHCP Offer packet on mge0 from 192.168.36.249 (ignored) (no root path)
uhub2: 4 ports with 4 removable, self powered
Sending DHCP Request packet from interface mge0 (00:50:43:01:55:18)
Received DHCP Ack packet on mge0 from 192.168.36.249 (accepted) (got root path)
mge0 at 192.168.36.32 server 192.168.36.249 boot file kernel.bin
subnet mask 255.255.255.0 router 192.168.36.1 rootfs 192.168.36.249:/sandbox/mv88f6281 rootopts nolockd
Adjusted interface mge0
Trying to mount root from nfs:. Press CTRL+C to abort.
NFS ROOT: 192.168.36.249:/sandbox/mv88f6281
ct_to_ts([2010-06-20 12:26:32]) = 1277036792.000000000
ct_to_ts([2010-06-20 12:26:32]) = 1277036792.000000000
start_init: trying /sbin/init
bridge0: bpf attached
bridge0: Ethernet address: ea:f1:41:17:54:1b
- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
Result of devinfo -rv
- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
nexus0
fdtbus0
unknown
unknown
simplebus0
ic0
I/O memory:
0xf1020200-0xf102023b
timer0
Interrupt request lines:
1
I/O memory:
0xf1020300-0xf102032f
unknown
gpio0
Interrupt request lines:
35
36
37
38
39
40
41
I/O memory:
0xf1010100-0xf101011f
rtc0
I/O memory:
0xf1010300-0xf1010307
twsi0
I/O memory:
0xf1011000-0xf101101f
iicbus0
iic0 at addr=0
mge0
Interrupt request lines:
11
12
13
14
46
I/O memory:
0xf1072000-0xf1073fff
miibus0
e1000phy0 pnpinfo oui=0x5043 model=0xb rev=0x3 at phyno=0
mge1
Interrupt request lines:
15
16
17
18
47
I/O memory:
0xf1076000-0xf1077fff
miibus1
e1000phy1 pnpinfo oui=0x5043 model=0xb rev=0x3 at phyno=1
uart0
Interrupt request lines:
33
I/O memory:
0xf1012000-0xf101201f
uart1
Interrupt request lines:
34
I/O memory:
0xf1012100-0xf101211f
unknown
ehci0
Interrupt request lines:
19
48
I/O memory:
0xf1050000-0xf1050fff
usbus0
uhub0
uhub1 pnpinfo vendor=0x05e3 product=0x0610 devclass=0x09 devsubclass=0x00 sernum="" release=0x7732 intclass=0x09 intsubclass=0x00 at bus=1 hubaddr=1 port=0 devaddr=2 interface=0
uhub2 pnpinfo vendor=0x05e3 product=0x0610 devclass=0x09 devsubclass=0x00 sernum="" release=0x7732 intclass=0x09 intsubclass=0x00 at bus=2 hubaddr=1 port=0 devaddr=3 interface=0
unknown
sata0
Interrupt request lines:
21
I/O memory:
0xf1080000-0xf1085fff
mvsch0 at channel=0
I/O memory addresses:
0xf1082000-0xf1083fff
mvsch1 at channel=1
I/O memory addresses:
0xf1084000-0xf1085fff
unknown
pcib0
I/O memory:
0xf1040000-0xf1041fff
pci0
vgapci0 pnpinfo vendor=0x18ca device=0x0027 subvendor=0x0000 subdevice=0x0000 class=0x030000 at slot=1 function=0
:
4093640704-4160749567
4160749568-4161011711
:
4044357632-4044357759
drm0
- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
--
Norikatsu Shigemura <nork at FreeBSD.org>
-------------- next part --------------
--- sys/dev/mge/if_mge.c.orig 2010-06-13 22:28:53.000000000 +0900
+++ sys/dev/mge/if_mge.c 2010-06-19 15:34:22.787728912 +0900
@@ -626,7 +626,6 @@
mge_attach(device_t dev)
{
struct mge_softc *sc;
- struct mii_softc *miisc;
struct ifnet *ifp;
uint8_t hwaddr[ETHER_ADDR_LEN];
int i, error ;
@@ -643,7 +642,7 @@
/* Get phy address from fdt */
if (fdt_get_phyaddr(sc->node, &sc->phyaddr) != 0)
- return (ENXIO);
+ sc->phyaddr = -1;
/* Initialize mutexes */
mtx_init(&sc->transmit_lock, device_get_nameunit(dev), "mge TX lock", MTX_DEF);
@@ -674,6 +673,9 @@
sc->tx_ic_time = 768;
mge_add_sysctls(sc);
+ if (sc->phyaddr == -1)
+ sc->phyaddr = MGE_READ(sc, MGE_REG_PHYDEV);
+
/* Allocate network interface */
ifp = sc->ifp = if_alloc(IFT_ETHER);
if (ifp == NULL) {
@@ -716,8 +718,7 @@
sc->mii = device_get_softc(sc->miibus);
/* Tell the MAC where to find the PHY so autoneg works */
- miisc = LIST_FIRST(&sc->mii->mii_phys);
- MGE_WRITE(sc, MGE_REG_PHYDEV, miisc->mii_phy);
+ MGE_WRITE(sc, MGE_REG_PHYDEV, sc->phyaddr);
/* Attach interrupt handlers */
for (i = 0; i < 2; ++i) {
@@ -867,8 +868,7 @@
struct mge_softc *sc = arg;
struct mge_desc_wrapper *dw;
volatile uint32_t reg_val;
- int i, count;
-
+ int i;
MGE_GLOBAL_LOCK_ASSERT(sc);
@@ -948,17 +948,6 @@
reg_val = MGE_READ(sc, MGE_PORT_SERIAL_CTRL);
reg_val |= PORT_SERIAL_ENABLE;
MGE_WRITE(sc, MGE_PORT_SERIAL_CTRL, reg_val);
- count = 0x100000;
- for (;;) {
- reg_val = MGE_READ(sc, MGE_PORT_STATUS);
- if (reg_val & MGE_STATUS_LINKUP)
- break;
- DELAY(100);
- if (--count == 0) {
- if_printf(sc->ifp, "Timeout on link-up\n");
- break;
- }
- }
/* Setup interrupts coalescing */
mge_set_rxic(sc);
@@ -1489,8 +1478,8 @@
MGE_TRANSMIT_LOCK_ASSERT(sc);
- if ((ifp->if_drv_flags & (IFF_DRV_RUNNING | IFF_DRV_OACTIVE)) !=
- IFF_DRV_RUNNING)
+ if (IFM_SUBTYPE(sc->mii->mii_media_active) == IFM_NONE ||
+ (ifp->if_drv_flags & (IFF_DRV_RUNNING | IFF_DRV_OACTIVE)) != IFF_DRV_RUNNING)
return;
for (;;) {
-------------- next part --------------
--- sys/dev/mvs/mvs_soc.c.orig 2010-05-22 23:16:43.239261000 +0900
+++ sys/dev/mvs/mvs_soc.c 2010-06-19 16:15:28.024566573 +0900
@@ -43,6 +43,8 @@
#include <sys/rman.h>
#include <arm/mv/mvreg.h>
#include <arm/mv/mvvar.h>
+#include <dev/ofw/ofw_bus.h>
+#include <dev/ofw/ofw_bus_subr.h>
#include "mvs.h"
/* local prototypes */
@@ -73,6 +75,9 @@
int i;
uint32_t devid, revid;
+ if (!ofw_bus_is_compatible(dev, "mrvl,sata"))
+ return (ENXIO);
+
soc_id(&devid, &revid);
for (i = 0; mvs_ids[i].id != 0; i++) {
if (mvs_ids[i].id == devid &&
@@ -445,6 +450,6 @@
mvs_methods,
sizeof(struct mvs_controller)
};
-DRIVER_MODULE(sata, mbus, mvs_driver, mvs_devclass, 0, 0);
+DRIVER_MODULE(sata, simplebus, mvs_driver, mvs_devclass, 0, 0);
MODULE_VERSION(sata, 1);
-------------- next part --------------
#
# Custom kernel for OpenRD Client/Ultimate devices.
#
# $FreeBSD$
#
ident OPENRD-CL
include "../mv/kirkwood/std.db88f6xxx"
options SOC_MV_KIRKWOOD
makeoptions MODULES_OVERRIDE=""
makeoptions DEBUG=-g #Build kernel with gdb(1) debug symbols
makeoptions WERROR="-Werror"
options SCHED_4BSD #4BSD scheduler
options INET #InterNETworking
options INET6 #IPv6 communications protocols
options FFS #Berkeley Fast Filesystem
options NFSCLIENT #Network Filesystem Client
options NFSLOCKD #Network Lock Manager
options NFS_ROOT #NFS usable as /, requires NFSCLIENT
options BOOTP
options BOOTP_NFSROOT
options BOOTP_NFSV3
options BOOTP_WIRED_TO=mge0
# Root fs on USB device
#options ROOTDEVNAME=\"ufs:/dev/da0a\"
options SYSVSHM #SYSV-style shared memory
options SYSVMSG #SYSV-style message queues
options SYSVSEM #SYSV-style semaphores
options _KPOSIX_PRIORITY_SCHEDULING #Posix P1003_1B real-time extensions
options MUTEX_NOINLINE
options RWLOCK_NOINLINE
options NO_FFS_SNAPSHOT
options NO_SWAPPING
# Debugging
options ALT_BREAK_TO_DEBUGGER
options DDB
options KDB
# Pseudo devices
device loop
device md
device pty
device random
# PCI Express
device pci
# Serial ports
device uart
# Networking
device ether
device mge # Marvell Gigabit Ethernet controller
device mii
device e1000phy
device bpf
# USB
options USB_DEBUG # enable debug msgs
device usb
device ehci
device umass
# SATA
device mvs
# CAM
device scbus
device da
device cd
device pass
# I2C (TWSI)
device iic
device iicbus
# Enable Flattened Device Tree support
options FDT
options FDT_DTB_STATIC
makeoptions FDT_DTS_FILE=openrd-cl.dts
-------------- next part --------------
/*
* Copyright (c) 2009-2010 The FreeBSD Foundation
* All rights reserved.
*
* This software was developed by Semihalf under sponsorship from
* the FreeBSD Foundation.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*
* OpenRD-Client/Ultimate Device Tree Source.
*
* $FreeBSD$
*/
/dts-v1/;
/ {
model = "mrvl,OpenRD-CL";
compatible = "OpenRD-CL";
#address-cells = <1>;
#size-cells = <1>;
aliases {
ethernet0 = &enet0;
ethernet1 = &enet1;
mpp = &MPP;
pci0 = &pci0;
serial0 = &serial0;
serial1 = &serial1;
soc = &SOC;
sram = &SRAM;
};
cpus {
#address-cells = <1>;
#size-cells = <0>;
cpu at 0 {
device_type = "cpu";
compatible = "ARM,88FR131";
reg = <0x0>;
d-cache-line-size = <32>; // 32 bytes
i-cache-line-size = <32>; // 32 bytes
d-cache-size = <0x4000>; // L1, 16K
i-cache-size = <0x4000>; // L1, 16K
timebase-frequency = <0>;
bus-frequency = <0>;
clock-frequency = <0>;
};
};
memory {
device_type = "memory";
reg = <0x0 0x20000000>; // 512M at 0x0
};
localbus at f1000000 {
#address-cells = <2>;
#size-cells = <1>;
compatible = "mrvl,lbc";
/* This reflects CPU decode windows setup. */
ranges = <0x0 0x0f 0xf9300000 0x00100000
0x1 0x1e 0xfa000000 0x00100000
0x2 0x1d 0xfa100000 0x02000000
0x3 0x1b 0xfc100000 0x00000400>;
nor at 0,0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "cfi-flash";
reg = <0x0 0x0 0x00100000>;
bank-width = <2>;
device-width = <1>;
};
led at 1,0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "led";
reg = <0x1 0x0 0x00100000>;
};
nor at 2,0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "cfi-flash";
reg = <0x2 0x0 0x02000000>;
bank-width = <2>;
device-width = <1>;
};
nand at 3,0 {
#address-cells = <1>;
#size-cells = <1>;
reg = <0x3 0x0 0x00100000>;
bank-width = <2>;
device-width = <1>;
};
};
SOC: soc88f6281 at f1000000 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "simple-bus";
ranges = <0x0 0xf1000000 0x00100000>;
bus-frequency = <0>;
PIC: pic at 20200 {
interrupt-controller;
#address-cells = <0>;
#interrupt-cells = <1>;
reg = <0x20200 0x3c>;
compatible = "mrvl,pic";
};
timer at 20300 {
compatible = "mrvl,timer";
reg = <0x20300 0x30>;
interrupts = <1>;
interrupt-parent = <&PIC>;
mrvl,has-wdt;
};
MPP: mpp at 10000 {
#pin-cells = <2>;
compatible = "mrvl,mpp";
reg = <0x10000 0x34>;
pin-count = <50>;
pin-map = <
0 1 /* MPP[0]: NF_IO[2] */
1 1 /* MPP[1]: NF_IO[3] */
2 1 /* MPP[2]: NF_IO[4] */
3 1 /* MPP[3]: NF_IO[5] */
4 1 /* MPP[4]: NF_IO[6] */
5 1 /* MPP[5]: NF_IO[7] */
6 1 /* MPP[6]: SYSRST_OUTn */
7 0 /* MPP[7]: GPO[7] */
8 1 /* MPP[8]: TW_SDA */
9 1 /* MPP[9]: TW_SCK */
10 3 /* MPP[10]: UA0_TXD */
11 3 /* MPP[11]: UA0_RXD */
12 1 /* MPP[12]: SD_CLK */
13 1 /* MPP[13]: SD_CMD */
14 1 /* MPP[14]: SD_D[0] */
15 1 /* MPP[15]: SD_D[1] */
16 1 /* MPP[16]: SD_D[2] */
17 1 /* MPP[17]: SD_D[3] */
18 1 /* MPP[18]: NF_IO[0] */
19 1 /* MPP[19]: NF_IO[1] */
20 3 /* MPP[20]: GE1[0] */
21 3 /* MPP[21]: GE1[1] */
22 3 /* MPP[22]: GE1[2] */
23 3 /* MPP[23]: GE1[3] */
24 3 /* MPP[24]: GE1[4] */
25 3 /* MPP[25]: GE1[5] */
26 3 /* MPP[26]: GE1[6] */
27 3 /* MPP[27]: GE1[7] */
28 0 /* MPP[28]: GPIO[28] */
29 1 /* MPP[29]: TSMP[9] */
30 3 /* MPP[30]: GE1[10] */
31 3 /* MPP[31]: GE1[11] */
32 3 /* MPP[32]: GE1[12] */
33 3 /* MPP[33]: GE1[13] */
34 0 /* MPP[34]: GPIO[34] */
35 2 /* MPP[35]: TDM_CH0_TX_QL */
36 2 /* MPP[36]: TDM_SPI_CS1 */
37 2 /* MPP[37]: TDM_CH2_TX_QL */
38 2 /* MPP[38]: TDM_CH2_RX_QL */
39 4 /* MPP[39]: AU_I2SBCLK */
40 4 /* MPP[40]: AU_I2SDO */
41 4 /* MPP[41]: AU_I2SLRCLK */
42 4 /* MPP[42]: AU_I2SMCLK */
43 4 /* MPP[43]: AU_I2SDI */
44 4 /* MPP[44]: AU_EXTCLK */
45 2 /* MPP[45]: TDM_PCLK */
46 2 /* MPP[46]: TDM_FS */
47 2 /* MPP[47]: TDM_DRX */
48 2 /* MPP[48]: TDM_DTX */
49 2>; /* MPP[49]: TDM_CH0_TX_QL */
};
GPIO: gpio at 10100 {
#gpio-cells = <3>;
compatible = "mrvl,gpio";
reg = <0x10100 0x20>;
gpio-controller;
interrupts = <35 36 37 38 39 40 41>;
interrupt-parent = <&PIC>;
};
rtc at 10300 {
compatible = "mrvl,rtc";
reg = <0x10300 0x08>;
};
twsi at 11000 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "mrvl,twsi";
reg = <0x11000 0x20>;
interrupts = <43>;
interrupt-parent = <&PIC>;
};
enet0: ethernet at 72000 {
#address-cells = <1>;
#size-cells = <1>;
model = "V2";
compatible = "mrvl,ge";
reg = <0x72000 0x2000>;
ranges = <0x0 0x72000 0x2000>;
local-mac-address = [ 00 00 00 00 00 00 ];
interrupts = <12 13 14 11 46>;
interrupt-parent = <&PIC>;
mdio at 0 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "mrvl,mdio";
};
};
enet1: ethernet at 76000 {
#address-cells = <1>;
#size-cells = <1>;
model = "V2";
compatible = "mrvl,ge";
reg = <0x76000 0x2000>;
ranges = <0x0 0x76000 0x2000>;
local-mac-address = [ 00 00 00 00 00 00 ];
interrupts = <16 17 18 15 47>;
interrupt-parent = <&PIC>;
mdio at 1 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "mrvl,mdio";
};
};
serial0: serial at 12000 {
compatible = "ns16550";
reg = <0x12000 0x20>;
reg-shift = <2>;
clock-frequency = <0>;
interrupts = <33>;
interrupt-parent = <&PIC>;
};
serial1: serial at 12100 {
compatible = "ns16550";
reg = <0x12100 0x20>;
reg-shift = <2>;
clock-frequency = <0>;
interrupts = <34>;
interrupt-parent = <&PIC>;
};
crypto at 30000 {
compatible = "mrvl,cesa";
reg = <0x30000 0x10000>;
interrupts = <22>;
interrupt-parent = <&PIC>;
};
usb at 50000 {
compatible = "mrvl,usb-ehci", "usb-ehci";
reg = <0x50000 0x1000>;
interrupts = <48 19>;
interrupt-parent = <&PIC>;
};
xor at 60000 {
compatible = "mrvl,xor";
reg = <0x60000 0x1000>;
interrupts = <5 6 7 8>;
interrupt-parent = <&PIC>;
};
sata at 80000 {
compatible = "mrvl,sata";
reg = <0x80000 0x6000>;
interrupts = <21>;
interrupt-parent = <&PIC>;
};
};
SRAM: sram at fd000000 {
compatible = "mrvl,cesa-sram";
reg = <0xfd000000 0x00100000>;
};
chosen {
stdin = "serial0";
stdout = "serial0";
};
pci0: pcie at f1040000 {
compatible = "mrvl,pcie";
device_type = "pci";
#interrupt-cells = <1>;
#size-cells = <2>;
#address-cells = <3>;
reg = <0xf1040000 0x2000>;
bus-range = <0 255>;
ranges = <0x02000000 0x0 0xf4000000 0xf4000000 0x0 0x04000000
0x01000000 0x0 0x00000000 0xf1100000 0x0 0x00100000>;
clock-frequency = <33333333>;
interrupt-parent = <&PIC>;
interrupts = <44>;
interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
interrupt-map = <
/* IDSEL 0x1 */
0x0800 0x0 0x0 0x1 &PIC 0x9
0x0800 0x0 0x0 0x2 &PIC 0x9
0x0800 0x0 0x0 0x3 &PIC 0x9
0x0800 0x0 0x0 0x4 &PIC 0x9
>;
pcie at 0 {
reg = <0x0 0x0 0x0 0x0 0x0>;
#size-cells = <2>;
#address-cells = <3>;
device_type = "pci";
ranges = <0x02000000 0x0 0xf4000000
0x02000000 0x0 0xf4000000
0x0 0x04040000
0x01000000 0x0 0x0
0x01000000 0x0 0x0
0x0 0x00100000>;
};
};
};
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