Routing benchmarks

[Benno Rice]

On 10/09/2008, at 1:16 AM, Jacques Fourie wrote:

[snip]

> Thanks for the nice idea - will try something similar. At the moment
> I'm also suspecting that cache handling has got a lot to do with the
> performance figures that I'm seeing. The PXA255 has a 32KB data and
> 32KB instruction cache.

As the author of the pxa, smc and related code, I can also attest to  
the fact that they could do with work.  In particular, I always seemed  
to get what I thought were oddly high interrupt rates coming off the  
smc interfaces.  This would be tying the CPU up in the interrupt/gpio- 
as-interrupt code and slowing things down.

-- 
Benno Rice
benno at jeamland.net