main clock frequency

[Bernd Walter]

On Wed, Jun 13, 2007 at 10:10:24AM +0200, Björn König wrote:
> So this is my patch.
> 
> It would be interesting for me to know the effective main clock values for
> 10.0 Hz and 16.0 Hz oscillators. My board uses a 18.432 Hz oscillator.

Unfortunately I'm out of time, but will put some tests on my todo list.
A wrong value here only hurts setting up the PLLB for USB.

> Currently I'm working on changing the PCK and MCK on-the-fly via sysctl
> MIB which basically works well for me.

Basicly this sounds intersting.
It might be interesting to switch PCK to 32kHz on idle, which should
be faster than waiting for PLL to setup.
I'm not shure about the possible PLL range anyway, since it requires
external components based on the intended frequency.

I'm a bit concerned about MCK since this also influences timing critical
devices, such as UART rate, SDRAM recharge rate and even timing for
custom hardware, e.g. motors on PWM.

-- 
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