Execution stops while enabling MMU

[Neil Bradley]

> I try to use FreeBSD with an AT91RM9200-based board similar to KB920X. I
> use an existing boot loader (U-Boot running at 0x00000000) to copy the raw
> binary kernel (not ELF) to the beginning of the SDRAM (0x20000000) and
> execute it with the "go" command. But suddenly the execution stops while
> enabling the MMU in src/sys/arm/arm/locore.S:
>
>  /* Enable MMU */
>  mrc     p15, 0, r0, c1, c0, 0
>  orr     r0, r0, #CPU_CONTROL_MMU_ENABLE
>  mcr     p15, 0, r0, c1, c0, 0

I'm a bit new to these parts, but I have done some MMU work with the 
XScale ARM (and other ARM CPUs), and enabling the MMU is a bit more 
complicated, especially dealing with ensuring the instruction pipelines 
aren't doing anything afterward when the MMU gets enabled. I didn't see 
the code that comes after this sequence, but here is my sequence for 
enabling the MMU, in hopes it will do some good. This assumes that 
virtual == physical for the sake of the code execution:

         mov     r1, #1
         mcr     p15, 0, r0, c8, c7, 0   ; Flush I+D TLBs
         mcr     p15, 0, r1, c7, c10, 4  ; Drain write and fill buffers

 	ldr	r2,=VirtualExecutionStart
 	mrc	p15, 0, r0, c1, c0, 0
 	orr	r0, r0, #0x1000		; Enable instruction cache
 	orr	r0, r0, #0x0800		; Enable branch target buffer
 	orr	r0, r0, #0x0004		; Enable data cache
 	orr	r0, r0, #0x0001		; Enable MMU
 	mcr	p15, 0, r0, c1, c0, 0
 	mov	pc, r2
 	nop
 	nop
 	nop

VirtualExecutionStart
 	....

As an aside, you might want to also enable the I and D cache (0x1004) 
along with the MMU enable, in addition to the branch target buffer 
(0x0800), as I have done above.

The code sequence above has been validated on the Intel PXA270, Intel 
IXP4xx series, Atmel SAM9 ARM9 CPUs, and the Freescale MX31. Hope this 
helps!

-->Neil

----------------------------------------------------------------------------
C. Neil Bradley - KE7IXP - The one eyed man in the land of the blind is not
                            king. He's a prisoner.