API change for bus_dma
gallatin at cs.duke.edu
Fri Jun 27 14:52:37 PDT 2003
Scott Long writes:
> > Unfortunately, in our application we must assume coherency in some
> > situations. We have kernel memory mmap'ed into user space for
> > zero-copy io of small messages. Doing a system call to force the dma
> > sync would add unacceptable latency. (we're talking sub 10us latencies
> > here, without syscalls).
> The bus_dmamap_sync() isn't done from a separate system call. The flow
> is this:
> set up S/G list;
> tell hardware that DMA is ready;
> The callback gets called immediately as long as conditions are met, as
> we have discuss prior.
> see that hardware has DMA'd data to us;
In our application, millions of separate DMAs can happen with no kernel
intervention at all.
We do the bus_dmamap_load() in the context of an ioctl which allocates
some kernel memory, and pokes the DMA addresses for the kernel memory
down onto the board. The user then mmaps the kernel memory, and also
mmaps a page of SRAM on our board.
When the user wants to initate a dma, he writes to the device's SRAM
indicating an offset in the mmaped kernel memory. The board then
initates the transfer (after doing bounds checking..).
When the user is done, or the process exits, the dma addresses are
cleared from the nic, and the kernel memory is freed.
This is OS-bypass networking.
> As I understand it, it is possible to set the pycho bridge to use
> a coherent address range, but FreeBSD doesn't take advantage of that
Yes, that's what solaris does..
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