cpu does not support long mode

[Peter Wemm]

On Wed, Jun 17, 2009 at 10:26 AM, Jo Rhett<jrhett at netconsonance.com> wrote:
>>
>> On Wed, 17 Jun 2009, Jo Rhett wrote:
>>>
>>> I've got a Tyan S2720 with dual Xeon 2.4G dual-core processors here that
>>> I was going to test out 64-bit support with.  However, the system fails
>>> during boot of the 7.2-RELEASE CD with
>>>
>>> warning: module 'acpi' already loaded
>>> Booting [/boot/kernel/kernel]...
>>> CPU does not support long mode
>>> OK
>
> On Jun 17, 2009, at 10:11 AM, Nate Eldredge wrote:
>>
>> Is that "does not" or "doesn't"?
>
> Probably "doesn't" -- I typed that in by hand and probably auto-corrected
> ;-)
>
>> Do you have FreeBSD/i386 working on the machine?  If so, please install
>> the misc/cpuid port and post the output of `cpuid'.
>
>
> Here it is:
>
>  eax in    eax      ebx      ecx      edx
> 00000000 00000002 756e6547 6c65746e 49656e69
> 00000001 00000f27 0002080b 00000000 bfebfbff
> 00000002 665b5001 00000000 00000000 007b7040
> 80000000 80000004 00000000 00000000 00000000
> 80000001 00000000 00000000 00000000 00000000
> 80000002 20202020 20202020 20202020 20202020
> 80000003 6e492020 286c6574 58202952 286e6f65
> 80000004 20294d54 20555043 30342e32 007a4847
>
> Vendor ID: "GenuineIntel"; CPUID level 2
>
> Intel-specific functions:
> Version 00000f27:
> Type 0 - Original OEM
> Family 15 - Pentium 4
> Extended family 0
> Model 2 - Intel Pentium 4 processor (generic) or newer
> Stepping 7
> Reserved 0
>
> Brand index: 11 [Intel Xeon processor]
> Extended brand string: "                  Intel(R) Xeon(TM) CPU 2.40GHz"
> CLFLUSH instruction cache line size: 8
> Hyper threading siblings: 2
>
> Feature flags: bfebfbff:
> FPU    Floating Point Unit
> VME    Virtual 8086 Mode Enhancements
> DE     Debugging Extensions
> PSE    Page Size Extensions
> TSC    Time Stamp Counter
> MSR    Model Specific Registers
> PAE    Physical Address Extension
> MCE    Machine Check Exception
> CX8    COMPXCHG8B Instruction
> APIC   On-chip Advanced Programmable Interrupt Controller present and
> enabled
> SEP    Fast System Call
> MTRR   Memory Type Range Registers
> PGE    PTE Global Flag
> MCA    Machine Check Architecture
> CMOV   Conditional Move and Compare Instructions
> FGPAT  Page Attribute Table
> PSE-36 36-bit Page Size Extension
> CLFSH  CFLUSH instruction
> DS     Debug store
> ACPI   Thermal Monitor and Clock Ctrl
> MMX    MMX instruction set
> FXSR   Fast FP/MMX Streaming SIMD Extensions save/restore
> SSE    Streaming SIMD Extensions instruction set
> SSE2   SSE2 extensions
> SS     Self Snoop
> HT     Hyper Threading
> TM     Thermal monitor
> 31     reserved
>
> TLB and cache info:
> 50: Instruction TLB: 4KB and 2MB or 4MB pages, 64 entries
> 5b: Data TLB: 4KB and 4MB pages, fully assoc., 64 entries
> 66: 1st-level data cache: 8KB, 4-way set assoc, 64 byte line size
> 40: No 2nd-level cache, or if 2nd-level cache exists, no 3rd-level cache
> 70: Trace cache: 12K-micro-op, 4-way set assoc
> 7b: 2

Yes, it is a 32-bit only cpu.

-- 
Peter Wemm - peter at wemm.org; peter at FreeBSD.org; peter at yahoo-inc.com; KI6FJV
"All of this is for nothing if we don't go to the stars" - JMS/B5
"If Java had true garbage collection, most programs would delete
themselves upon execution." -- Robert Sewell