Atheros 9285 & Atheros AR8131
nate at root.org
Wed Apr 6 21:51:41 UTC 2011
On 4/6/2011 1:00 PM, John Baldwin wrote:
> On Monday, March 28, 2011 2:06:27 pm John Baldwin wrote:
>> We've never figured out what is zeroing the registers in the PCI-PCI bridges.
>> I suspect it is not something in the ASL, but is a side effect of some BIOS
>> code that runs in SMM when ACPI is turned on.
> Ok, so I have a patch to rework how PCI-PCI bridges manage resources for
> devices. This patch applies to HEAD, no idea if it applies to older branches
> (likely not). You will need to add the option 'NEW_PCIB' to your kernel
> config after applying this patch.
> For my local testing I used a hack to wipe out the PCI-PCI bridges in my
> test machine similar to what the BIOS does on these machines. The bridges
> all grew windows to match their original BIOS-assigned windows based on the
> BIOS-assigned resources in the BARs of the child devices.
> These patches should also let us allocate new resources from scratch for
> devices behind PCI-PCI bridges once we have better support for determining what
> are valid PCI address ranges in the Host-PCI bridge drivers.
Wow, awesome work. This is really useful for fixing a common problem.
Should bus_adjust_resource() be a DEVMETHOD or is this something that
should be done automatically within rman_alloc_resource(), possibly
based on a device flag?
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