acpi_throttle: quirk based on pci info

Andriy Gapon avg at icyb.net.ua
Fri Feb 22 15:57:00 UTC 2008


on 19/02/2008 21:25 Andriy Gapon said the following:
>> Andriy Gapon wrote:
>>>> On Feb 18, 2008, at 11:18 AM, Andriy Gapon wrote:
>>>>
>>>>> While looking for something else I accidentally noticed that
>>>>> acpi_throttle has one quirk for some early revisions of PIIX4 chipset
>>>>> and the quirk is enabled based on PCI info.
>>>>> I have a newer revision of PIIX4 so the quirk is not applicable in  
>>>>> my case.
>>>>>
>>>>> Nevertheless I noticed that acpi_throttle is initialized before PCI  
>>>>> bus
>>>>> driver, so when it calls pci_find_device() it always returns NULL and
>>>>> quirk is not applied. At least this is what I see in dmesg on my  
>>>>> machine.
[snip]
>>> I.e. no identify method for acpi bus.
>>> Additional device/driver for pci bus.
>>> pci probe method checks for duplicates and adds the acpi device as a
>>> child to acpi bus.
>>> pci probe method sets quirks based on pci info.
>>> pci probe method runs device_probe_and_attach on the acpi device.
>>> as a consequence acpi probe and attach (for successful probe) are executed.
[snip]
> I have a bit of a practical interest in it: I have a system based on
> PIIX4E (as you already know). Its ACPI FADT specifies duty offset of 1
> and duty width of 1. So, according to FADT only 50% throttling is available.
> On the other hand, chipset specification updates for PIIX4E and PIIX4M
> say that PCNTRL (P_CNT) register has 3 bits (at offset 1 indeed) for
> controlling throttling in 12.5% steps.
> So it seems, that acpi_throttle controls only the lowest bit of the
> three; moreover, it seems that BIOS assigns some initial value to those
> bits. So when throttling is active those bits do not have 001 value
> corresponding to 87.5% duty cycle, but have some XX1 value and that
> value seems to be 111 (12.5% duty cycle), because the system becomes
> extremely slow.
> So, as experiment, I hardcoded duty width to 3 and everything works
> great - I have 8 throttling steps and system performance seems to really
> correspond to expected duty levels.
> So now I am thinking about writing a proper patch for this (positive) quirk.


Please find attached a patch that makes sure that acpi_thermal is
initialized after PCI bus is available, so that it is possible to decide
about hardware quirks based on PCI information.
The code uses the same approach as ichss does.
The patch is tested to work.

NOTE: This patch in contaminated! It contains code that forces throttle
duty width to be 3 bits for PIIX4E and PIIX4M. This is in accordance
with the chipsets specifications. Some motherboard/bios vendors lie
about this value in FADT.
If not accepted, this quirk can be easily stripped from the patch as its
code is contained in distinct hunks.

> Reference:
> http://www.intel.com/design/chipsets/specupdt/29773817.pdf
> 


-- 
Andriy Gapon
-------------- next part --------------
A non-text attachment was scrubbed...
Name: acpi_throttle-piix4-width.patch
Type: text/x-patch
Size: 4100 bytes
Desc: not available
Url : http://lists.freebsd.org/pipermail/freebsd-acpi/attachments/20080222/eec3defc/acpi_throttle-piix4-width.bin


More information about the freebsd-acpi mailing list